Manufacturing pathway and associated challenges for nanoscale computational systems

2009 9th IEEE Conference on Nanotechnology, IEEE NANO 2009

Volumn , Issue , 2009, Pages 119-122

  Narayanan, Pritish ^a   Park, Kyoung Won ^b   Chui, Chi On ^b   Moritz, C Andras ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Nanoscale fabrics; NASIC; Self assembly

Indexed keywords

COMPUTATIONAL SYSTEM; CONVENTIONAL PHOTOLITHOGRAPHY; DIGITAL LOGIC CIRCUIT; FUNCTIONALIZATIONS; LARGE SYSTEM; MULTIPLE DEVICES; NANO DEVICE; NANO SCALE; NANOSCALE FABRICS; SELF-ALIGNING PROCESS;

FABRICS; LOGIC CIRCUITS; SELF ASSEMBLY; SWITCHING CIRCUITS;

NANOSTRUCTURED MATERIALS;

EID: 77950980223     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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