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Volumn , Issue , 2009, Pages 224-226

Fabrication of trench isolation and trench power MOSFETs in a smart power IC technology with a single trench unit process

Author keywords

[No Author keywords available]

Indexed keywords

BREAKDOWN VOLTAGE; POWER MOSFETS; PROCESS COSTS; SMART POWER IC; SPECIFIC-ON-RESISTANCE; TRENCH ISOLATION; TRENCH POWER MOSFET; UNIT PROCESS;

EID: 77949981654     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPSD.2009.5158042     Document Type: Conference Paper
Times cited : (9)

References (8)
  • 3
    • 77949950877 scopus 로고    scopus 로고
    • MOS Transistor Device with a locally maximum concentration region between the source region and the drain region,
    • U.S. Patent 6 885 062, Apr. 26
    • M. Zundel, F. Hirler, and R. Lantier, "MOS Transistor Device with a locally maximum concentration region between the source region and the drain region," U.S. Patent 6 885 062, Apr. 26, 2005.
    • (2005)
    • Zundel, M.1    Hirler, F.2    Lantier, R.3
  • 4
    • 77949960022 scopus 로고    scopus 로고
    • MOS field plate trench transistor device,
    • U.S. Patent 7 372 103, May 13
    • M. Zundel and F. Hirler, "MOS field plate trench transistor device," U.S. Patent 7 372 103, May 13, 2008.
    • (2008)
    • Zundel, M.1    Hirler, F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.