Invasive algorithms and architectures;Invasive Algorithmen und Architekturen

IT - Information Technology

Volumn 50, Issue 5, 2008, Pages 300-310

  Teich, Jürgen ^a  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

B Hardware ; B.7 Hardware: Integrated Circuits ; C Computer Systems Organization ; C.1 Computer Systems Organization: Processor Architectures ; C.3 Computer Systems Organization: Special Purpose and Application Based Systems

Indexed keywords

COMPUTER HARDWARE; PARALLEL ARCHITECTURES; PROGRAM PROCESSORS; SYSTEM-ON-CHIP;

B [HARDWARE]; B.7 [HARDWARE: INTEGRATED CIRCUIT]; C [COMPUTER SYSTEM ORGANIZATION]; C.1 [COMPUTER SYSTEM ORGANIZATION: PROCESSOR ARCHITECTURE]; C.3 [COMPUTER SYSTEM ORGANIZATION: SPECIAL-PURPOSE AND APPLICATION- BASED SYSTEM]; COMPUTER SYSTEM ORGANIZATION; PROCESSOR ARCHITECTURES; SINGLE PROCESSORS;

TIMING CIRCUITS;

EID: 77949370311     PISSN: 16112776     EISSN: 21967032     Source Type: Journal    
DOI: 10.1524/itit.2008.0499     Document Type: Article

References (20)

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