Organic computing at the system on chip level

IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Volumn , Issue , 2006, Pages 338-341

  Bouajila, A ^a   Zeppenfeld, J ^a   Stechele, W ^a   Herkersdorf, A ^a   Bernauer, A ^b   Bringmann, O ^c   Rosenstiel, W ^b  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

^b UNIVERSITY OF TÜBINGEN   (Germany)

^c UNIVERSITY OF KARLSRUHE   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCIES; CMOS TECHNOLOGIES; CPU CORES; DEVICE SIZES; EVOLUTION (CO); FAULT COVERAGE (FC); FAULT TOLERANCES; INTEGRATED CIRCUIT (IC) DESIGN; INTERMITTENT FAULTS; INTERNATIONAL CONFERENCES; ORGANIC COMPUTING; PROCESS VARIABILITY; PUBLIC DOMAINS; SELF CALIBRATION; SELF-ORGANIZATION (SO); SOC ARCHITECTURES; SUPPLY VOLTAGES; SYSTEM ON CHIP (SOCS); VERY LARGE SCALE INTEGRATION (VLSI);

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; ELECTRIC FAULT CURRENTS; ELECTRON BEAM LITHOGRAPHY; FAULT TOLERANCE; INTEGRATED CIRCUIT MANUFACTURE; LSI CIRCUITS; MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS); PIPELINES; PROGRAMMABLE LOGIC CONTROLLERS; QUALITY ASSURANCE; REDUCED INSTRUCTION SET COMPUTING; RELIABILITY; TIMING CIRCUITS;

INTEGRATED CIRCUITS;

COMPUTATION; COMPUTER CHIPS; DEFECTS; ELECTRIC CIRCUITS; ELECTRIC POTENTIAL; ELECTRON BEAMS; LITHOGRAPHY; MICROPROCESSORS; QUALITY CONTROL; RELIABILITY; SEMICONDUCTOR DEVICES;

EID: 46249119848     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSISOC.2006.313257     Document Type: Conference Paper

References (12)

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