Error correction codes for SEU and SEFI tolerant memory systems

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2009, Pages 425-430

  Pontarelli, S ^a,b   Cardarilli, G C ^a   Re, M ^a   Salsano, A ^a  

^a UNIVERSITY OF ROME TOR VERGATA   (Italy)

^b ITALIAN SPACE AGENCY   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CODE RATES; DATA LOSS; ERASURE CORRECTION; ERROR CORRECTION CODES; HSIAO CODES; MEMORY CHIPS; MEMORY ORGANIZATIONS; MEMORY SYSTEMS; SINGLE EVENT; SINGLE EVENT UPSETS; SPACE-BORNE;

DEFECTS; ELECTRIC NETWORK ANALYSIS; ERROR CORRECTION; ERROR DETECTION; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; PROBABILITY DENSITY FUNCTION; URANIUM POWDER METALLURGY;

QUALITY ASSURANCE;

EID: 77649332312     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2009.8     Document Type: Conference Paper

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