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Volumn , Issue , 2009, Pages 351-356

GRPlacer: Improving routability and wire-length of global routing with circuit replacement

Author keywords

[No Author keywords available]

Indexed keywords

BIPARTITE MATCHINGS; CELL SORTING; CONGESTION REDUCTION; GLOBAL ROUTING; LOWER BOUNDS; PHYSICAL DESIGN; PLACEMENT AND ROUTING; ROUTABILITY; WIRE LENGTH; WIRE LENGTH ESTIMATION;

EID: 76349116045     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (15)

References (13)
  • 1
    • 33947609584 scopus 로고    scopus 로고
    • Seeing the Forest and the Trees: Steiner Wirelength Optimization in placement
    • April
    • J. A. Roy, J. F. Lu, and I. L. Markov. "Seeing the Forest and the Trees: Steiner Wirelength Optimization in placement," IEEE Trans. on Computer-Aided Design, vol. 26 no. 4, pp. 632-644, April 2007
    • (2007) IEEE Trans. on Computer-Aided Design , vol.26 , Issue.4 , pp. 632-644
    • Roy, J.A.1    Lu, J.F.2    Markov, I.L.3
  • 2
    • 34547267305 scopus 로고    scopus 로고
    • IPR: An integrated placement and routing algorithm
    • M. Pan and Chris Chu. "IPR: an integrated placement and routing algorithm," In Proc. Design Automation Conf., pp. 59-62, 2007.
    • (2007) Proc. Design Automation Conf , pp. 59-62
    • Pan, M.1    Chu, C.2
  • 4
    • 34548295220 scopus 로고    scopus 로고
    • Fast and accurate routing demand estimation for efficient routability-driven placement
    • Nice, France
    • P. Spindler and F. M. Johannes. "Fast and accurate routing demand estimation for efficient routability-driven placement," In Proc. of DATE, pp. 1226-1231, Nice, France, 2007.
    • (2007) Proc. of DATE , pp. 1226-1231
    • Spindler, P.1    Johannes, F.M.2
  • 5
    • 51549118747 scopus 로고    scopus 로고
    • Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs
    • Z.-W. Jiang, B.-Y. Su, and Y.-W. Chang . "Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs," In Proc. Design Automation Conf., pp. 167-172, 2008.
    • (2008) Proc. Design Automation Conf , pp. 167-172
    • Jiang, Z.-W.1    Su, B.-Y.2    Chang, Y.-W.3
  • 6
    • 64549099361 scopus 로고    scopus 로고
    • Efficient Simulated Evolution Based Rerouting and Congestion-Relaxed Layer Assignment on 3-D Global Routing
    • K.-R. Dai, W.-H. Liu, and Y.-L. Li, "Efficient Simulated Evolution Based Rerouting and Congestion-Relaxed Layer Assignment on 3-D Global Routing", in Proc. Asia and South Pacific Design Automation Conf, 2009
    • (2009) Proc. Asia and South Pacific Design Automation Conf
    • Dai, K.-R.1    Liu, W.-H.2    Li, Y.-L.3
  • 7
    • 0019478261 scopus 로고
    • An Efficient Algorithm for the Two-Dimensional Placement Problem in Electrical Circuit Layout
    • S. Goto. "An Efficient Algorithm for the Two-Dimensional Placement Problem in Electrical Circuit Layout," In IEEE Transitions on Circuits and Systems, Vol. CAS-28, No. 1, pp. 12-18, 1981.
    • (1981) IEEE Transitions on Circuits and Systems , vol.CAS-28 , Issue.1 , pp. 12-18
    • Goto, S.1
  • 10


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.