IPR: An integrated placement and routing algorithm

Proceedings - Design Automation Conference

Volumn , Issue , 2007, Pages 59-62

  Pan, Min ^a   Chu, Chris ^b  

^a CADENCE DESIGN SYSTEMS   (United States)

^b Iowa State University of Science and Technology   (United States)

Author keywords

Integration; Placement; Routing

Indexed keywords

GLOBAL ROUTING; GLOBAL ROUTING WIRELENGTH; INTEGRATED PLACEMENT AND ROUTING (IPR); INTERCONNECT MODELS;

INTEGRATED CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION; VLSI CIRCUITS;

ROUTING ALGORITHMS;

EID: 34547267305     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2007.375125     Document Type: Conference Paper

References (12)

1. X. Yang, B. K. Choi and M. Sarrafzadeh. Routability Driven White Space Allocation for Fixed-die Standard-cell Placement. In Proc. Intl. Symp. on Physical Design, pp. 42-49, 2002.
2. C. Li, M. Xie, C. K. Koh, J. Cong and P. H. Madden. Routability-driven Placement and White Space Allocation. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, pp. 394-401, 2004.
3. N. Selvakkumaran, P7 Parakh and G. Karypis. Perimeter-degree: A Priori Metric for Directly Measuring and Homogenizing Interconnection Complexity in Multilevel Placement. In Proc. Intl. Workshop on System-Level Interconnect Prediction, pp. 53-59, 2003.
4. D. Jariwala and J. Lillis. On Interactions Between Routing and Detailed Placement. In Proc. IEEE/ACM Intl. Conf. on Computer-Aiaed Design, pp. 387-393, 2004.
5. J. A. Roy, J. F. Lu and I. L. Markov. Seeing the Forest and the Trees: Steiner Wirelength Optimization in Placement. In Proc. Intl. Symp. on Physical Design, pp. 78-85, 2006.
6. M. Pan and C. Chu. FastRoute: A step to integrate global routing into placement. In Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design, 2006.
7. N. Viswanathan and Chris Chu. FastPlace: Efficient Analytical Placement using Cell Shifting, Iterative Local Refinement and a Hybrid Net Model. In Proc. Intl. Symp. on Physical Design, pp. 26-33, 2004.
8. Chris Chu. FLUTE: Fast Lookup Table Based Wirelength Estimation Technique. In Proc. IEEE/ACM Intl. Conf. on Computer-Aiaed Design, 696-701, 2004.
9. Chris Chu and Yiu-Chung Wong. Fast and Accurate Rectilinear Steiner Minimal Tree Algorithm for VLSI Design. In Proc. Intl. Symp. on Physical Design, pp. 28-35, 2005.
10. N. Viswanathan, M. Pan and Chris Chu. FastPlace 2.0: An Efficient Analytical Placer for Mixed-Mode Designs. In Asia and South Pacific Design Autom. Conf., pp. 195-200, 2006.
11. M. Pan, N. Viswanathan and Chris Chu. An Efficient and Effective Detailed Placement Algorithm. In Proc. IEEE/ACM Intl. Conf. Computer-Aided Design, pp. 48-55, 2005.
12. M. Pan and C. Chu. FastRoute 2.0: A High-quality and Efficient Global Router. To appear. Asia and South Pacific Design Autom. Conf., 2007.