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Volumn 44, Issue 12, 2009, Pages 3294-3304

A 1.8 V 1.0 GS/s 10b self-calibrating unified-folding-interpolating ADC With 9.1 ENOB at nyquist frequency

Author keywords

Analog to digital conversion; Calibration; CMOS analog integrated circuits; Folding; High speed techniques; Interpolation; Nyquist converter; Pipelined

Indexed keywords

ANALOG TO DIGITAL CONVERTERS; CMOS ANALOG INTEGRATED CIRCUITS; DUAL CHANNEL; FOLDING; HIGH-SPEED TECHNIQUES; HIGHER RESOLUTION; INTERPOLATING ADC; NYQUIST; NYQUIST CONVERTERS; NYQUIST FREQUENCY; POWER CONSUMPTION; SELF-CALIBRATING;

EID: 72949112080     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2032634     Document Type: Conference Paper
Times cited : (32)

References (15)
  • 1
    • 0018052957 scopus 로고
    • 2L and LWT thin-film resistors
    • Dec.
    • 2L and LWT thin-film resistors," IEEE J. Solid-State Circuits, vol.SC-13, pp. 736-745, Dec. 1978.
    • (1978) IEEE J. Solid-State Circuits , vol.SC-13 , pp. 736-745
    • Brokaw1    Paul, A.2
  • 3
    • 0017980602 scopus 로고
    • A high-speed 8 bit A/D converter based on a gray-code multiple folding circuit
    • Jun.
    • U. Fiedler and D. Seitzer, "A high-speed 8 bit A/D converter based on a gray-code multiple folding circuit," IEEE J. Solid-State Circuits, vol.SC-14, pp. 547-551, Jun. 1979.
    • (1979) IEEE J. Solid-State Circuits , vol.SC-14 , pp. 547-551
    • Fiedler, U.1    Seitzer, D.2
  • 5
    • 10444248089 scopus 로고    scopus 로고
    • A1.8-V 1.6-GSample/s 8-b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency
    • Dec.
    • R. Taft et al., "A1.8-V 1.6-GSample/s 8-b self- calibrating foldingADC with 7.26 ENOB at Nyquist frequency," IEEE J. Solid-State Circuits, vol.39, pp. 2107- 2115, Dec. 2004.
    • (2004) IEEE J. Solid-State Circuits , vol.39 , pp. 2107-2115
    • Taft, R.1
  • 6
    • 0023570553 scopus 로고
    • An 8-bit video ADC incorporating folding and interpolation techniques
    • Dec.
    • R. van de Grift et al., "An 8-bit video ADC incorporating folding and interpolation techniques," IEEE J. Solid-State Circuits, vol.22, pp. 944-953, Dec. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.22 , pp. 944-953
    • Van De Grift, R.1
  • 7
    • 0031378861 scopus 로고    scopus 로고
    • A 12-b 60-MSample/s cascaded folding and interpolation ADC
    • Dec.
    • P. Vorenkamp and R. Roovers, "A 12-b 60-MSample/s cascaded folding and interpolation ADC," IEEE J. Solid- State Circuits, vol.32, pp. 1876-1886, Dec. 1997.
    • (1997) IEEE J. Solid- State Circuits , vol.32 , pp. 1876-1886
    • Vorenkamp, P.1    Roovers, R.2
  • 8
    • 0035247339 scopus 로고    scopus 로고
    • An 8b 100 MSample/s CMOS pipelined folding ADC
    • Feb.
    • M.-J. Choe et al., "An 8b 100 MSample/s CMOS pipelined folding ADC," IEEE J. Solid-State Circuits, vol.36, pp. 184-194, Feb. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , pp. 184-194
    • Choe, M.-J.1
  • 9
    • 4644340757 scopus 로고    scopus 로고
    • A layout structure for matching many integrated resistors
    • Jan.
    • J. P. A. van der Wagt et al., "A layout structure for matching many integrated resistors," IEEE Trans. Circuits Syst. I, vol.51, pp. 186-190, Jan. 2004.
    • (2004) IEEE Trans. Circuits Syst. I , vol.51 , pp. 186-190
    • Van Der Wagt, J.P.A.1
  • 11
    • 0023599417 scopus 로고
    • A pipelined 5-Msample/s 9-bit analog-to-digital converter
    • Dec.
    • S. H. Lewis and P. R. Gray, "A pipelined 5-Msample/s 9-bit analog-to-digital converter," IEEE J. Solid-State Circuits, vol.SC-22, pp. 954-961, Dec. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 954-961
    • Lewis, S.H.1    Gray, P.R.2
  • 12
    • 0003135251 scopus 로고
    • A technique for reducing differential nonlinearity errors in flash A/D converters
    • Feb.
    • K. Kattmann and J. Barrow, "A technique for reducing differential nonlinearity errors in flash A/D converters," in IEEE ISSCC Dig. Tech. Papers, Feb. 1991, pp. 170-171.
    • (1991) IEEE ISSCC Dig. Tech. Papers , pp. 170-171
    • Kattmann, K.1    Barrow, J.2
  • 13
    • 34548831968 scopus 로고    scopus 로고
    • An 11b 800MS/s time-interleaved ADC with digital background calibration
    • Feb.
    • C.-C. Hsu, "An 11b 800MS/s time-interleaved ADC with digital background calibration," in IEEE ISSCC Visual Supplement to the Dig. Tech. Papers, Feb. 2007, pp. 378- 378
    • (2007) IEEE ISSCC Visual Supplement to the Dig. Tech. Papers , pp. 378-378
    • Hsu, C.-C.1
  • 14
    • 72949114969 scopus 로고    scopus 로고
    • AT84AS008 WEB-datasheet 0922B-BDC-03/08, E2V Semiconductors, [Online]. Available
    • AT84AS008 WEB-datasheet 0922B-BDC-03/08, E2V Semiconductors, 2008 [Online]. Available: www.e2v.com/download.cfm?type=document&document=1259
    • (2008)
  • 15
    • 41549143171 scopus 로고    scopus 로고
    • A 1.35 GS/s, 10b, 175 mW time-interleaved ad converter in 0.13μm CMOS
    • Apr.
    • S. M. Louwsma et al., "A 1.35 GS/s, 10b, 175 mW time-interleaved ad converter in 0.13μm CMOS," IEEE J. Solid-State Circuits, vol.43, pp. 778-786, Apr. 2008.
    • (2008) IEEE J. Solid-State Circuits , vol.43 , pp. 778-786
    • Louwsma, S.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.