A layout structure for matching many integrated resistors

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 1, 2004, Pages 186-190

  van der Wagt, J Paul A ^a   Chu, Gordon G ^b   Conrad, Christine L ^c  

^a MARVELL SEMICONDUCTOR INC   (United States)

^b G Plus Inc   (United States)

^c ROCKWELL SCIENTIFIC COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; ERROR ANALYSIS; INTEGRATED CIRCUIT TESTING; MEASUREMENT ERRORS; MONOLITHIC INTEGRATED CIRCUITS; PASSIVE NETWORKS; RESISTORS;

ANALOG INTEGRATED CIRCUITS; CORE RESISTOR ARRAY; INTEGRATED RESISTORS; LAYOUT STRUCTURE;

INTEGRATED CIRCUIT LAYOUT;

EID: 4644340757     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2003.821303     Document Type: Article

References (10)

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