Heterogeneous integration technology for MEMS-LSI multi-chip module

2009 IEEE International Conference on 3D System Integration, 3DIC 2009

Volumn , Issue , 2009, Pages

  Lee, K W ^a   Kanno, S ^a   Ohara, Y ^a   Kiyoyama, K ^a   Bea, J C ^a   Fukushima, T ^a   Tanaka, T ^a   Koyanagi, M ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP DESIGN; FUNDAMENTAL CHARACTERISTICS; HETEROGENEOUS INTEGRATION; INTERCONNECTION TECHNOLOGY; LEAD WIRE; LSI CHIPS; MEMS CHIPS; PRESSURE SENSING; STEP HEIGHT; STRONG SOLUTION;

LSI CIRCUITS; MEMS; THREE DIMENSIONAL;

MICROELECTROMECHANICAL DEVICES;

EID: 70549095278     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2009.5306599     Document Type: Conference Paper

References (9)

1. N. Sillon, D. Henry, J-C Souriau, J. Brun, H. Boutry, S. Cheramy, " New trends in wafer level packaging," IITC, pp. 211-213, 2009
2. M.J. Wolf, P. Ramm, A. Klumpp, H. Reichl, "Technologies for 3D Wafer Level Heterogeneous Integration", DTIP of MEMS/MOEMS 2008, pp. 123-126, 2008
3. T. Fukushima, T. Konno, K. Kiyoyama, M. Murugesan, K. Sato, W.-C. Jeong, Y. Ohara, A. Noriki, S. Kanno, Y. Kaiho, H. Kino, K. Makita, K.-W. Lee, J.-C. Bea, T. Tanaka, and M. Koyanagi, "New Heterogeneous Multi-Chip Module Integration Technology Using Self-Assembly Method", IEDM, pp. 499-502, 2008
4. M. Murugesan, J.C. Bea, S.Y. Ji, C.K. Yin, K. Kiyoyama, T. Konno, H. Kino, Y. Ohara, T. Fukushima, T. Tanaka, M. Koyanagi, "The formation of Lateral Interconnections Extending over 100-mm-Thick Chips" Extended Abs. of SSDM Sep. 2008, pp. 472-473
5. Murugesan, M.; Bea, J.-C.; Fukushima, T.; Konno, T.; Kiyoyama, K.; Jeong, W.-C.; Kino, H.; Noriki, A.; Lee, K.-W.; Tanaka, T.; Koyanagi, M., "Cu lateral interconnects formed between 100-μm-thick self-assembled chips on flexible substrates " ECTC, pp. 1496-1501, 2009
6. Y. Shimooka, M. Inoue, M. Endo, S. Obata, A. Kojima, T. Miyagi, I. Mori, and H. Shibata, "Robust Hermetic Wafer Level Thin Film Encapsulation Technology for Stacked MEMS / IC Package" ECTC, pp. 824-828, 2008
7. N. Marenco, W. Reinert, S. Warnat, P. Lange, S. Gruenzig, G. Allegato, G. Hillmann, H. Kostner, W. Gal, S. Guadagnuolo, A. Conte, K. Malecki, K. Friedel, "Investigation of Key Technologies for System-in-Package Integration of Inertial MEMS" DTIP of MEMS/MOEMS, pp. 35-40, 2009
8. Takahashi, K.; Mita, M.; Nakada, M.; Yamane, D.; Higo, A.; Fujita, H.; Toshiyoshi, H., "Development of Multi-User Multi-Chip SOI CMOS-MEMS Processes " MEMS, pp. 701-704, 2009
9. Kuwabara, K.; Sato, N.; Morimura, H.; Kodate, J.; Nakamura, M.; Ugajin, M.; Kamei, T.; Kudou, K.; Machida, K.; Ishii, H., "Integrated MEMS LC Resonator with Sealed Air-Suspended Structure for Single-Chip RF LSIs " IEDM, pp. 423-426, 2007