Robust hermetic wafer level thin-film encapsulation technology for stacked MEMS / IC package

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2008, Pages 824-828

  Shimooka, Y ^a   Inoue, M ^b   Endo, M ^a   Obata, S ^b   Kojima, A ^a   Miyagi, T ^b   Sugizaki, Y ^a   Mori, I ^b   Shibata, H ^a  

^a Semiconductor Company   (Japan)

^b TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER NETWORKS; DIES; FINITE ELEMENT METHOD; INTEGRATED CIRCUITS; INTERNET PROTOCOLS; MEMS; MICROPROCESSOR CHIPS; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; REINFORCEMENT; SEMICONDUCTING SILICON COMPOUNDS; SILICA; SILICON COMPOUNDS; SILICON WAFERS; TECHNOLOGY; THIN FILM DEVICES; WAFER BONDING;

MEMS CHIPS; THIN-FILM ENCAPSULATION;

MICROELECTROMECHANICAL DEVICES;

EID: 51349085624     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2008.4550071     Document Type: Conference Paper

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