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Volumn , Issue , 2009, Pages 231-236

A low power 3D integrated FFT engine using hypercube memory division

Author keywords

3DIC; FFT; Scaling

Indexed keywords

3-D INTEGRATION; DIGITAL LOGIC CIRCUIT; FFT PROCESSORS; HYPERCUBE; LOW POWER; MEMORY ACCESS; POWER CONSUMPTION; WIRE LENGTH;

EID: 70449723372     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1594233.1594289     Document Type: Conference Paper
Times cited : (4)

References (16)
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    • R. Hentschke, G. Flach, F. Pinto, and R. Reis. Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. In SBCCI '06: Proceedings of the 19th annual symposium on Integrated circuits and systems design, pages 220-225, New York, NY, USA, 2006. ACM.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.