A 2.4-GHz resistive feedback LNA in 0.13-μm CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 11, 2009, Pages 3019-3029

  Joo, Sanghoon ^a   Choi, Tae Young ^a   Jung, Byunghoo ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Gm boosted LNA; Low noise amplifier (LNA); Noise figure; Resistive feedback; Voltage gain boosting

Indexed keywords

2.4GHZ LNA; EXTERNAL INPUT; FIGURE OF MERIT; FULLY INTEGRATED; GM-BOOSTED LNA; INDUCTIVELY DEGENERATED; INPUT MATCHING; LOW-NOISE AMPLIFIER (LNA); MATCHING NETWORKS; Q-FACTORS; RESISTIVE FEEDBACK; SERIES INDUCTOR; VOLTAGE GAIN BOOSTING;

GAIN MEASUREMENT; LOW NOISE AMPLIFIERS; NOISE FIGURE; TOPOLOGY;

AUDIO FREQUENCY AMPLIFIERS;

EID: 70449503115     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2031912     Document Type: Article

References (55)

1. D. K. Shaeffer and T. H. Lee, A 1.5-V, 1.5-GHz CMOS low noise amplifier, IEEE J. Solid-State Circuits, vol.32, no.5, pp. 745-759, May 1997.
2. D. K. Shaeffer and T. H. Lee, Comment on Corrections to a 1.5-V, 1.5-GHz CMOS low noise amplifier, IEEE J. Solid-State Circuits, vol.41, no.10, pp. 2359-2359, Oct. 2006.
3. D. J. Allstot, X. Li, and S. Shekhar, Design considerations for CMOS low-noise amplifiers, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2004, pp. 97-100.
4. F. Bruccoleri, E. A. M. Klumperink, and B. Nauta, Wide-band CMOS low-noise amplifier exploiting thermal noise canceling, IEEE J. Solid- State Circuits, vol.39, no.2, pp. 275-282, Feb. 2004.
5. J. Borremans, P. Wambacq, C. Soens, Y. Rolain, and M. Kuijk, Low-area active-feedback low-noise amplifier design in scaled digital CMOS, IEEE J. Solid-State Circuits, vol.43, no.11, pp. 2422-2433, Nov. 2008.
6. P. Heydari, Design and analysis of a performance-optimized CMOS UWB distributed LNA, IEEE J. Solid-State Circuits, vol.42, no.9, pp. 1892-1905, Sep. 2007.
7. A. Bevilacqua and A. M. Niknejad, An ultrawideband CMOS lownoise amplifier for 3.1-10.6-GHz wireless receivers, IEEE J. Solid- State Circuits, vol.39, no.12, pp. 2259-2268, Dec. 2004.
8. T. Taris, Y. Deval, and J. B. Begueret, Current reuse CMOS LNA for UWB applications, in Proc. European Solid-State Circuits Conf. (ESSCIRC), Sep. 2008, pp. 294-297.
9. C.-W. Kim, M.-S. Kang, P. T. Anh, H.-T. Kim, and S.-G. Lee, An ultra-wideband CMOS low noise amplifier for 3-5-GHz UWB system, IEEE J. Solid-State Circuits, vol.40, no.3, pp. 544-547, Mar. 2005.
10. V. K. Dao, Q. D. Bui, and C. S. Park, A multi-band 900 MHz/1.8 GHz/ 5.2 GHz LNA for reconfigurable radio, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2007, pp. 69-72.
11. Y. Gao, Y. Zheng, and B.-L. Ooi, A 0.18-m CMOS UWB LNA with 5 GHz interference rejection, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2007, pp. 47-50. (Pubitemid 47486617)
12. K. Bhatia, S. Hyvonen, and E. Rosenbaum, An 8-mW, ESD-protected, CMOS LNA for ultra-wideband applications, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2006, pp. 385-388.
13. S. C. Blaakemeer, E. A. M. Klumperink, D. M. W. Leenaerts, and B. Nauta, Wideband balun-LNA with simultaneous output balancing, noise-canceling and distortion-canceling, IEEE J. Solid-State Circuits, vol.43, no.6, pp. 1341-1350, Jun. 2008.
14. S. Chehrazi, A. Mirzaei, R. Bagheri, and A. A. Abidi, A 6.5 GHz wideband CMOS low noise amplifier for multi-band use, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2005, pp. 801-804.
15. W.-H. Chen, G. Liu, B. Zdravko, and A. M. Niknejad, A highly linear broadband CMOS LNA employing noise and distortion cancellation, IEEE J. Solid-State Circuits, vol.43, no.5, pp. 1164-1176, May 2008.
16. D.-G. Im, S.-S. Song, H.-T. Kim, and K. Lee, A widebandCMOSvariable- gain low noise amplifier for multi-standard terrestrial and cable TV tuner, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2007, pp. 621-624.
17. J. Jussila and P. Sivonen, A 1.2-V highly linear balanced noise-cancelling LNA in 0.13-m CMOS, IEEE J. Solid-State Circuits, vol.43, no.3, pp. 579-587, Mar. 2008.
18. C.-F. Liao and S.-I. Liu, A broadband noise-canceling CMOS LNA for 3.1-10.6-GHz UWB receivers, IEEE J. Solid-State Circuits, vol.42, no.2, pp. 329-339, Feb. 2007.
19. T. Kihara, T. Matsuoka, and K. Taniquchi, A 1.0 V, 2.5 mW, transformer noise-canceling UWB CMOS LNA, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2008, pp. 493-496.
20. A. Liscidini, C. Ghezzi, E. Depaoli, G. Albasini, I. Bietti, and R. Castello, Common gate transformer feedback LNA in a high IIP3 current mode RF CMOS front-end, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2006, pp. 25-28.
21. X. Li, S. Shekhar, and D. J. Allstot, Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-m CMOS, IEEE J. Solid-State Circuits, vol.40, no.12, pp. 2609-2619, Dec. 2005.
22. J. S. Walling, S. Shekhar, and D. J. Allstot, A-boosted currentreuse LNA in 0.18 -m CMOS, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2007, pp. 613-616.
23. H. Hashemi and A. Hajimiri, Concurrent multi-band low-noise amplifiers: Theory, design, and applications, IEEE Trans. Microw. Theory Tech., vol.50, no.1, pp. 288-302, Jan. 2002.
24. J. R. Long and M. A. Copeland, The modeling, characterization, and design of monolithic inductors for silicon RF IC's, IEEE J. Solid-State Circuits, vol.32, no.3, pp. 357-369, Mar. 1997.
25. A. Van Der Ziel, Noise in solid-state devices and lasers, Proc. IEEE, vol.58, no.8, pp. 1178-1206, Aug. 1970.
26. S. C. Blaakmeer, E. A. Klumperink, D. M. Leenaerts, and B. Nauta, A wideband noise-canceling CMOS LNA exploiting a transformer, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2006.
27. S. Lou and H. C. Luong, A 0.8 GHz-10.6 GHz SDR low-noise amplifier in 0.13--m CMOS, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2008, pp. 65-68.
28. D. Linten, S. Thijs, M. I. Natarajan, P. Wambacq, W. Jeamsaksiri, J. Ramos, A. Mercha, S. Jenei, S. Donnay, and S. Decoutere, A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS, IEEE J. Solid-State Circuits, vol.40, no.7, pp. 1434-1442, Jul. 2005.
29. D. Linten, L. Aspemyr,W. Jeamsaksiri, J. Ramos, A. Mercha, S. Jenei, S. Thijs, R. Garcia, H. Jacobsson, P.Wambacq, S. Donnay, and S. Decoutere, Low-power 5 GHz LNA and VCO in 90 nm RF CMOS, in Proc. IEEE VLSI Circuits Symp., Jun. 2004, pp. 372-375.
30. D. Linten, X. Sun, S. Thijs, M. I. Natarajan, A. Mercha, G. Carchon, P. Wambacq, T. Nakaie, and S. Decoutere, Low-power low-noise highly ESD robust LNA, and VCO design using above-IC inductors, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2005, pp. 497-500.
31. X. Fan, H. Zhang, and E. Sanchez-Sinencio, A noise reduction and linearity improvement technique for a differential cascode LNA, IEEE J. Solid-State Circuits, vol.43, no.3, pp. 588-599, Mar. 2008.
32. K. Han, J. Gil, S.-S. Song, J. Han, H. Shin, C. K. Kim, and K. Lee, Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier, IEEE J. Solid- State Circuits, vol.40, no.3, pp. 726-735, Mar. 2005.
33. B. A. Floyd and D. Ozis, Low-noise amplifier comparison at 2 GHz in 0.25--m and 0.18--m RF-CMOS and SiGe BiCMOS, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2004, pp. 185-188.
34. D. Griffith, A +7.9 dBm IIP3 LNA for CDMA2000 in a 90 nm digital CMOS process, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2006.
35. Y.-W. Hsiao and M.-D. Ker, An ESD-protected 5-GHz differential low-noise amplifier in a 130-nm CMOS process, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2008, pp. 233-236.
36. N. Kim, V. Aparin, K. Barnett, and C. Persico, A cellular-bandCDMA 0.25--m CMOS LNA linearized using active post-distortion, IEEE J. Solid-State Circuits, vol.41, no.7, pp. 1530-1534, Jul. 2006.
37. T.-S. Kim and B.-S. Kim, Linearization of differential CMOS low noise amplifier using cross-coupled post distortion canceller, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2008, pp. 83-86.
38. H.-J. Lee, D. S. Ha, and S. S. Choi, A 3 to 5 GHz CMOS UWB LNA with input matching using Miller effect, in IEEE ISSCC Dig. Tech. Papers, Feb. 2006, pp. 202-203.
39. R. Gharpurey, A broadband low-noise front-end amplifier for ultra wideband in 0.13--m CMOS, IEEE J. Solid-State Circuits, vol.40, no.9, pp. 1983-1986, Sep. 2005.
40. S. R. Karri, A. Arasu, K. W.Wong, Y. Zheng, and F. Lin, Low-power UWB LNA and mixer using 0.18-m CMOS technology, in Proc. European Solid-State Circuits Conf. (ESSCIRC), Sep. 2006, pp. 259-262.
41. B. G. Perumana, J.-H. C. Zhan, S. S. Taylor, and J. Laskar, A 5 GHz, 21 dBm output-IP3 resistive feedback LNA in 90-nm CMOS, in Proc. European Solid-State Circuits Conf. (ESSCIRC), Sep. 2007, pp. 372-375.
42. L. Tripodi and H. Brekelmans, Low-noise variable-gain amplifier in 90-nm CMOS for TV on mobile, in Proc. European Solid-State Circuits Conf. (ESSCIRC), Sep. 2007, pp. 368-371.
43. M. Vidojkovic, M. Sanduleanu, J. Van Der Tang, P. Baltus, and A. Van Roermund, A 1.2 V, inductorless, broadband LNA in 90 nm CMOS LP, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2007, pp. 53-56.
44. C.-S. Wang and C.-K. Wang, A 90 nm CMOS low noise amplifier using noise neutralizing for 3.1-10.6 GHz UWB system, in Proc. European Solid-State Circuits Conf. (ESSCIRC), Sep. 2006, pp. 251-254.
45. J.-H. C. Zhan and S. S. Taylor, A 5 GHz resistive-feedback CMOS LNA for low-cost multi-standard applications, in IEEE ISSCC Dig. Tech. Papers, Feb. 2006, pp. 200-201.
46. R. Ramzan, S. Andersson, J. Dabrowski, and C. Svensson, A 1.4 V 25 mW inductorless wideband LNA in 0.13 m CMOS, in IEEE ISSCC Dig. Tech. Papers, Feb. 2007, pp. 424-425.
47. E. Adabi and A. M. Niknejad, CMOS low noise amplifier with capacitive feedback matching, in Proc. IEEE Custom Integrated Circuits Conf. (CICC), Sep. 2007, pp. 643-646.
48. A. Bevilacqua, A. Vallese, C. Sandner, M. Tiebout, A. Gerosa, and A. Neviani, A 0.13 mCMOSLNAwith integrated balun and notch filter for 3-to-5 GHz UWB receivers, in IEEE ISSCC Dig. Tech. Papers, Feb. 2007, pp. 420-421.
49. C.-T. Fu and C.-N. Kuo, 3 11 -GHz CMOS UWB LNA using dual feedback for broadband matching, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2006, pp. 67-70.
50. F. Zhang and P. R. Kinget, Low-power programmable gain CMOS distributed LNA, IEEE J. Solid-State Circuits, vol.41, no.6, pp. 1333-1343, Jun. 2006.
51. M. T. Reiha and J. R. Long, A 1.2 V reactive-feedback 3.1-10.6 GHz low-noise amplifier in 0.13 m CMOS, IEEE J. Solid-State Circuits, vol.42, no.5, pp. 1023-1033, May 2007.
52. S. B. T. Wang, A. M. Niknejad, and R. W. Brodersen, Design of a sub-mW 960-MHz UWB CMOS LNA, IEEE J. Solid-State Circuits, vol.41, no.11, pp. 2449-2456, Nov. 2006.
53. S. Shekhar, J. S. Walling, S. Aniruddhan, and D. J. Allstot, CMOS VCO and LNA using tuned-input tuned-output circuits, IEEE J. Solid- State Circuits, vol.43, no.5, pp. 1177-1186, May 2008.
54. G. Sapone and G. Palmisano, A 90-nm CMOS two-stage low-noise amplifier for 3-5-GHz ultra-wideband radio, in Proc. IEEE Radio Frequency Integrated Circuits Symp., Jun. 2008, pp. 489-492.
55. B. Kleveland, T. J. Maloney, I. Morgan, L. Madden, T. H. Lee, and S. S. Wong, Distributed ESD protection for high-speed integrated circuits, IEEE Electron Device Lett., vol.21, pp. 390-392, Aug. 2000