A 1-GS/s 6-Bit two-channel two-step ADC in 0.13-μm CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 11, 2009, Pages 3051-3059

  Chen, Hung Wei ^a   Chen, I Ching ^a   Tseng, Huan Chieh ^a   Chen, Hsin Shu ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Analog to digital converter; High speed; Low power; Power efficiency; Time interleaved; Two step

Indexed keywords

ANALOG-TO-DIGITAL CONVERTER; HIGH SPEED; LOW POWER; POWER EFFICIENCY; TIME-INTERLEAVED; TWO-STEP;

AMPLIFICATION; ELECTRIC POWER UTILIZATION; FREQUENCY CONVERTERS; HYBRID COMPUTERS;

MULTICARRIER MODULATION;

EID: 70449484388     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2032258     Document Type: Article

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