A 7b 1.1GS/s reconfigurable time-interleaved ADC in 90nm CMOS

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2007, Pages 66-67

  Hsu, Cheng Chung ^a   Huang, Chen Chih ^a   Lin, Ying Hsi ^a   Lee, Chao Cheng ^a   Soe, Zaw ^b   Aytur, Turgut ^b   Yan, Ran Hong ^b  

^a REALTEK SEMICONDUCTOR CORP   (Taiwan)

^b NONE   (Taiwan)

Author keywords

Reconfigurable; Time interleaved pipeline ADC

Indexed keywords

RECONFIGURABLE; SAMPLING RATE; TIME INTERLEAVED PIPELINE ADC;

ELECTRIC POWER UTILIZATION; MODULATION; SAMPLING;

CMOS INTEGRATED CIRCUITS;

EID: 39749088154     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2007.4342768     Document Type: Conference Paper

References (2)