Explicit analysis of channel mismatch effects in time-interleaved ADC systems

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 48, Issue 3, 2001, Pages 261-271

  Kurosawa, Naoki ^b   Kobayashi, Haruo ^a,b   Maruyama, Kaoru ^b   Sugawara, Hidetake ^b   Kobayashi, Kensuke ^c  

^a IEEE   (Japan)

^b GUNMA UNIVERSITY   (Japan)

^c Teratec Corporation   (Japan)

Author keywords

A D converter; Analog circuit; Calibration; Channel mismatch; Interleave; Track hold circuit

Indexed keywords

ANALOG CIRCUIT; CHANNEL MISMATCH EFFECTS; TIME INTERLEAVED SYSTEMS; TRACK HOLD CIRCUIT;

ALGORITHMS; BANDWIDTH; COMMUNICATION CHANNELS (INFORMATION THEORY); FREQUENCY DOMAIN ANALYSIS; LINEAR NETWORKS; SIGNAL TO NOISE RATIO; TIMING CIRCUITS;

ANALOG TO DIGITAL CONVERSION;

EID: 0035271860     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.915383     Document Type: Article

References (12)

1. An 4 GHz 8b ADC systems
2. An 8-gigasample-per-second 8-bit data acquisition system for a sampling digital oscilloscope
3. An 8-GSa/s 8-bit ADC system
4. An 8b 85MS/s parallel pipeline A/D converter in 1 μm CMOS
5. An analog background calibration technique for time-interleaved analog-to-digital converters
6. A digital background calibration technique for time-interleaved analog-to-digital converters
7. Time interleaved converter arrays
8. Aperture jitter effects on wideband sampling systems
9. Digital spectra of nonuniformly sampled signals: Fundamentals and high-speed waveform digitizers
10. Analysis of mismatch effects among A/D converters in a time-interleaved waveform digitizers
11. Accuracy in interleaved ADC system
12. Channel linerity mismatch effects in time-interleaved ADC systems