Performance analysis of clearspeed's CSX600 interconnects

Proceedings - 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009

Volumn , Issue , 2009, Pages 203-210

  Nishikawa, Yuri ^a,c   Koibuchi, Michihiro ^b   Yoshimi, Masato ^a,c   Shitara, Akihiro ^a   Miura, Kenichi ^b   Amano, Hideharu ^a  

^a KEIO UNIVERSITY   (Japan)

^b NATIONAL INSTITUTE OF INFORMATICS   (Japan)

^c JAPAN SCIENCE AND TECHNOLOGY AGENCY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYSIS RESULTS; DATA ALIGNMENTS; LIMITATION FACTORS; MANY-CORE; NETWORK BANDWIDTH; ONE-DIMENSIONAL ARRAYS; PARALLEL APPLICATION; PERFORMANCE ANALYSIS; PERFORMANCE FACTORS; PRACTICAL ISSUES; PROCESSING ELEMENTS; SHARED MEMORIES; SIMD PROCESSING;

DATA TRANSFER; DISTRIBUTED PARAMETER NETWORKS;

BIOLOGICAL MATERIALS;

EID: 70449466935     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPA.2009.102     Document Type: Conference Paper

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