Increasing data reuse of sparse algebra codes on simultaneous multithreading architectures

Concurrency and Computation: Practice and Experience

Volumn 21, Issue 15, 2009, Pages 1838-1856

  Pichel, J C ^a   Heras, D B ^b   Cabaleiro, J C ^b   Rivera, F F ^b  

^a UNIVERSIDAD CARLOS III DE MADRID   (Spain)

^b UNIVERSITY OF SANTIAGO DE COMPOSTELA   (Spain)

Author keywords

Data reuse; Irregular codes; Locality; Multithreading; Sparse algebra codes; Sparse matrix

Indexed keywords

MATRIX ALGEBRA; MEMORY ARCHITECTURE; MULTITASKING;

DATA REUSE; IRREGULAR CODES; LOCALITY; MULTI-THREADING; SPARSE ALGEBRA CODES; SPARSE MATRICES;

CODES (SYMBOLS);

EID: 70349124898     PISSN: 15320626     EISSN: 15320634     Source Type: Journal    
DOI: 10.1002/cpe.1404     Document Type: Article

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