Modeling and improving locality for the sparse-matrix-vector product on cache memories

Future Generation Computer Systems

Volumn 18, Issue 1, 2001, Pages 55-67

  Heras, D B ^a   Blanco, V ^a   Cabaleiro, J C ^a   Rivera, F F ^a  

^a UNIVERSITY OF SANTIAGO DE COMPOSTELA   (Spain)

Author keywords

Cache memory; Locality; Memory hierarchy; Ordering algorithms; Sparse matrix

Indexed keywords

ALGORITHMS; HEURISTIC METHODS; MATRIX ALGEBRA; TREES (MATHEMATICS); VECTORS;

SPARSE MATRIX;

CACHE MEMORY;

EID: 0035450031     PISSN: 0167739X     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-739X(00)00075-3     Document Type: Article

References (24)

1. Data and computation transformations for multiprocessors
2. Matrix Market: A web resource for test matrix collections
3. An automatic one-way dissection algorithm for irregular finite-element problems
4. The evolution of the minimum degree algorithm
5. Study of data locality for iterative methods
6. Cache considerations for multiprocessors programmers
7. A quantitative analysis of loop nest locality
8. Block algorithms for sparse matrix computations on high performance workstations
9. Memory data organization for improved cache performance in embedded processor applications
10. The traveling salesman. Computational solutions for TSP applications
11. Characterizing the behavior of sparse algorithms on caches
12. False sharing and spatial locality in multiprocessor caches
13. Characterizing the memory behavior of compiler-parallelized applications
14. A data locality optimization algorithm