Comparative study on program/erase efficiency and retention properties of 3-D SONOS flash memory cell array transistors: Structural approach from double-gate FET and FinFET to gate-all-around FET

Journal of the Korean Physical Society

Volumn 54, Issue 5 PART 1, 2009, Pages 1854-1861

  Park, So Ra ^a   Kim, Kwan Young ^a   Choi, Changmin ^a   Song, Kwan Jae ^a   Park, Jun Hyun ^a   Jeon, Kichan ^a   Lee, Sunyeong ^a   Kim, Tae Yoon ^a   Lee, Ji Eun ^a   Lee, Sangwon ^a   Park, Sungwook ^a   Jang, Jaeman ^a   KlM, Dong Myong ^a   Kim, Dae Hwan ^a  

^a Kookmin University   (South Korea)

Author keywords

Cell array transistor; Corner effect; Double gate; Erase efficiency; Field concentration effect; FinFET; Gate all around; Program efficiency; Retention properties; SONOS; TCAD

Indexed keywords

EID: 68049127692     PISSN: 03744884     EISSN: None     Source Type: Journal    
DOI: 10.3938/jkps.54.1854     Document Type: Article

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