Performance-energy tradeoffs in reliable NoCs

Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009

Volumn , Issue , 2009, Pages 141-146

  Lan, Ying Cherng ^a   Chen, Michael C ^a   Chen, Wei De ^a   Chen, Sao Jie ^a   Hu, Yu Hen ^b  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^b University of Wisconsin Madison   (United States)

Author keywords

Energy; Network on Chip; Performance; Reliability

Indexed keywords

COMMUNICATION NETWORKS; ENERGY; ENERGY TRADEOFF; ERROR CONTROL CODE; LOW-POWER DESIGN; MULTI-CORE SYSTEMS; NETWORK-ON-CHIP; PERFORMANCE; PRIMARY OBJECTIVE; PROCESS TECHNOLOGIES;

COMMUNICATION CHANNELS (INFORMATION THEORY); ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; FAULT TOLERANCE; MICROPROCESSOR CHIPS; QUALITY ASSURANCE; TELECOMMUNICATION NETWORKS;

ROUTERS;

EID: 67649661664     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2009.4810284     Document Type: Conference Paper

References (12)

1. R. Ho, K. W. Mai, and M. A. Horowitz, "The Future of Wires," Proceedings of the IEEE, vol. 89, no. 4, pp. 490-504, Apr. 2001.
2. L. Benini and G. De Micheli, "Networks on Chips: a New SoC paradigm," IEEE Computer, vol. 35, no. 1, pp. 70-78, Jan. 2002.
3. G. De Micheli and L. Benini, Networks on Chips, Morgan Kaufmann, 2006.
4. W. J. Dally and B. Towles, "Route Packets, Not Wires: On-Chip Interconnection Networks," in Proceedings of the DAC, pp. 684-689, 2001.
5. J. Hoffman, D.A. Ilitzky, A. Chun, and A. Chapyzhenka, "Architecture of the Scalable Communications Core," in Proceedings of the International Symposium on Networks-on-Chip, pp. 40-52, May 2007.
6. D. Bertozzi, L. Benini, and G. De Micheli, "Error Control Schemes for On-Chip Communication Links: the Energy-Reliability Tradeoff," IEEE Trans. Computer- Aided Design of Integrated Circuits and Systems, vol. 24, no. 6, pp. 818-831, June 2005.
7. S. Murali, T. Theocharides, N. Vijaykrishnan, M.J. Irwin, L. Benini, and G. De Micheli, "Analysis of error recovery schemes for networks on chips," IEEE Design and Test of Computers, vol. 22, no. 5, pp. 434-442, 2005.
8. A.P. Frantz, F.L. Kastensmidt, L. Carro, and E. Cota, "Evaluation of SEU and Crosstalk Effects in Networkson- Chip Switches," in Proceedings of the Symposium on Integrated Circuits and System Design,pp. 202-207, Aug-Sep 2006.
9. R. Hegde and N.R. Shanbhag, "Toward Achieving Energy Eficiency in Presence of Deep Submicron Noise," IEEE Trans. VLSI Systems,vol. 8, no. 4, pp. 379- 391, Aug 2000.
10. E. Shih, "Physical Layer Driven Protocol and Algorithm Design for Energy-Efficient Wireless Sensor Netoworks," in Proceedings of the International Conference on Mobile Computing and Networking,pp. 272-287, 2001.
11. G. M. Chiu, "The odd-even turn model for adaptive routing," IEEE Trans. on Parallel and Distributed Systems, vol. 11, no. 7, pp. 729-738, July 2000.
12. S. Lin and D. J. Costello, Error Control Coding,Prentice-Hall, 1983.