Study of subharmonically injection-locked PLLs

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 5, 2009, Pages 1539-1553

  Lee, Jri ^a   Wang, Huaide ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Injection locking; Phase noise; Phase locked loop (PLL); Rms jitter; Subharmonic locking

Indexed keywords

CMOS TECHNOLOGY; FUNDAMENTAL THEORY; INJECTION LOCKED; INJECTION LOCKING; LOCKING PHENOMENON; LOCKING RANGE; NOISE PERFORMANCE; NOISE-SHAPING; PHASE-LOCKED LOOP (PLL); POWER DISSIPATION; RMS JITTER; SUBHARMONIC; SUBHARMONIC LOCKING;

CMOS INTEGRATED CIRCUITS; JITTER; PHASE NOISE;

PHASE LOCKED LOOPS;

EID: 66149183156     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2016701     Document Type: Conference Paper

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