-
2
-
-
84978092325
-
-
T. Toffoli, Reversible computing, in Automata, Languages and Programming, W. de Bakker and J. van Leeuwen, Eds. Springer, 1980, p. 632, technical Memo MIT/LCS/TM-151, MIT Lab. for Comput. Sci.
-
T. Toffoli, "Reversible computing," in Automata, Languages and Programming, W. de Bakker and J. van Leeuwen, Eds. Springer, 1980, p. 632, technical Memo MIT/LCS/TM-151, MIT Lab. for Comput. Sci.
-
-
-
-
3
-
-
0036907069
-
Reversible logic circuit synthesis
-
V. Shende, A. Prasad, I. Markov, and J. Hayes, "Reversible logic circuit synthesis," in Int'l Conf. on CAD, 2002, pp. 353-360.
-
(2002)
Int'l Conf. on CAD
, pp. 353-360
-
-
Shende, V.1
Prasad, A.2
Markov, I.3
Hayes, J.4
-
5
-
-
33750588847
-
An algorithm for synthesis of reversible logic circuits
-
P. Gupta, A. Agrawal, and N. Jha, "An algorithm for synthesis of reversible logic circuits," IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 25, no. 11, pp. 2317-2330, 2006.
-
(2006)
IEEE Trans. on CAD of Integrated Circuits and Systems
, vol.25
, Issue.11
, pp. 2317-2330
-
-
Gupta, P.1
Agrawal, A.2
Jha, N.3
-
6
-
-
0043136670
-
A transformation based algorithm for reversible logic synthesis
-
D. M. Miller, D. Maslov, and G. W. Dueck, "A transformation based algorithm for reversible logic synthesis," in Design Automation Conf., 2003, pp. 318-323.
-
(2003)
Design Automation Conf
, pp. 318-323
-
-
Miller, D.M.1
Maslov, D.2
Dueck, G.W.3
-
7
-
-
20444459774
-
Toffoli network synthesis with templates
-
D. Maslov, G. W. Dueck, and D. M. Miller, "Toffoli network synthesis with templates." IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 24, no. 6, pp. 807-817, 2005.
-
(2005)
IEEE Trans. on CAD of Integrated Circuits and Systems
, vol.24
, Issue.6
, pp. 807-817
-
-
Maslov, D.1
Dueck, G.W.2
Miller, D.M.3
-
8
-
-
33748112109
-
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis
-
W. Hung, X. Song, G. Yang, J. Yang, and M. Perkowski, "Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis." IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 25, no. 9, pp. 1652-1663, 2006.
-
(2006)
IEEE Trans. on CAD of Integrated Circuits and Systems
, vol.25
, Issue.9
, pp. 1652-1663
-
-
Hung, W.1
Song, X.2
Yang, G.3
Yang, J.4
Perkowski, M.5
-
9
-
-
34748897094
-
Exact SAT-based toffoli network synthesis
-
D. Große, X. Chen, G. Dueck, and R. Drechsler, "Exact SAT-based toffoli network synthesis," in Great Lakes Symp. VLSI, 2007, pp. 96-101.
-
(2007)
Great Lakes Symp. VLSI
, pp. 96-101
-
-
Große, D.1
Chen, X.2
Dueck, G.3
Drechsler, R.4
-
10
-
-
84919401135
-
A machine program for theorem proving
-
M. Davis, G. Logeman, and D. Loveland, "A machine program for theorem proving," Comm. of the ACM, vol. 5, pp. 394-397, 1962.
-
(1962)
Comm. of the ACM
, vol.5
, pp. 394-397
-
-
Davis, M.1
Logeman, G.2
Loveland, D.3
-
11
-
-
0032680865
-
GRASP: A search algorithm for prepositional satisfiability
-
J. Marques-Silva and K. Sakallah, "GRASP: A search algorithm for prepositional satisfiability," IEEE Trans. on Comp., vol. 48, no. 5, pp. 506-521, 1999.
-
(1999)
IEEE Trans. on Comp
, vol.48
, Issue.5
, pp. 506-521
-
-
Marques-Silva, J.1
Sakallah, K.2
-
12
-
-
0034852165
-
Chaff: Engineering an efficient SAT solver
-
M. Moskewicz, C. Madigan, Y. Zhao, L. Zhang, and S. Malik, "Chaff: Engineering an efficient SAT solver," in Design Automation Conf., 2001, pp. 530-535.
-
(2001)
Design Automation Conf
, pp. 530-535
-
-
Moskewicz, M.1
Madigan, C.2
Zhao, Y.3
Zhang, L.4
Malik, S.5
-
13
-
-
30344450270
-
An extensible SAT solver
-
SAT 2003
-
N. Eén and N. Sörensson, "An extensible SAT solver," in SAT 2003, ser. LNCS, vol. 2919, 2004, pp. 502-518.
-
(2004)
ser. LNCS
, vol.2919
, pp. 502-518
-
-
Eén, N.1
Sörensson, N.2
-
14
-
-
50249088195
-
The MathSAT 3 System
-
M. Bozzano, R. Bruttomesso, A. Cimatti, T. Junttila, P. Rossum, S. Schulz, and R. Sebastiani, "The MathSAT 3 System," in Int. Conf. on Automated Deduction, 2005.
-
(2005)
Int. Conf. on Automated Deduction
-
-
Bozzano, M.1
Bruttomesso, R.2
Cimatti, A.3
Junttila, T.4
Rossum, P.5
Schulz, S.6
Sebastiani, R.7
-
17
-
-
0001340960
-
-
Reprinted in:, Ed, Springer, Berlin
-
(Reprinted in: J. Siekmann, G. Wrightson (Ed.), Automation of Reasoning, Vol. 2, Springer, Berlin, 1983, pp. 466-483.).
-
(1983)
Automation of Reasoning
, vol.2
, pp. 466-483
-
-
-
18
-
-
0031618668
-
A decision procedure for bit-vector arithmetic
-
C. Barrett, D. Dill, and J. Levitt, "A decision procedure for bit-vector arithmetic," in Design Automation Conf, 1998, pp. 522-527.
-
(1998)
Design Automation Conf
, pp. 522-527
-
-
Barrett, C.1
Dill, D.2
Levitt, J.3
-
20
-
-
49749135618
-
SWORD: A SAT like Prover Using Word Level Information
-
R. Wille, G. Fey, D. Große, S. Eggersglüß, and R. Drechsler, "SWORD: A SAT like Prover Using Word Level Information," in Int'l Conference on Very Large Scale Integration, 2007.
-
(2007)
Int'l Conference on Very Large Scale Integration
-
-
Wille, R.1
Fey, G.2
Große, D.3
Eggersglüß, S.4
Drechsler, R.5
-
23
-
-
25544459735
-
Reversible logic and quantum computers
-
A. Peres, "Reversible logic and quantum computers," Phys. Rev. A, no. 32, pp. 3266-3276, 1985.
-
(1985)
Phys. Rev. A
, Issue.32
, pp. 3266-3276
-
-
Peres, A.1
-
24
-
-
33750189955
-
Conservative logic
-
E. F. Fredkin and T. Toffoli, "Conservative logic," International Journal of Theoretical Physics, vol. 21, no. 3/4, pp. 219-253, 1982.
-
(1982)
International Journal of Theoretical Physics
, vol.21
, Issue.3-4
, pp. 219-253
-
-
Fredkin, E.F.1
Toffoli, T.2
-
25
-
-
17044458279
-
Spectral and two-place decomposition techniques in reversible logic
-
D. M. Miller, "Spectral and two-place decomposition techniques in reversible logic," Midwest Symposium on Circuits and Systems, 2002.
-
(2002)
Midwest Symposium on Circuits and Systems
-
-
Miller, D.M.1
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