The effect of gate-bias stress and temperature on the performance of ZnO thin-film transistors

IEEE Transactions on Device and Materials Reliability

Volumn 8, Issue 2, 2008, Pages 277-282

  Cross, Richard B M ^a   De Souza, Maria Merlyne ^b  

^a DE MONTFORT UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF SHEFFIELD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL MOBILITIES; CHANNEL REGIONS; DEVICE TRANSFERS; ELEVATED TEMPERATURES; GATE-BIAS STRESS; NEGATIVE STRESS; ROOM TEMPERATURES; SHORT PERIODS; SUB-THRESHOLD BEHAVIORS; TRAP STATE; UNDER GATES; ZNO; ZNO LAYERS;

CHARGE TRAPPING; MOSFET DEVICES; SEMICONDUCTING ORGANIC COMPOUNDS; SEMICONDUCTING ZINC COMPOUNDS; THIN FILM DEVICES; THIN FILM TRANSISTORS; ZINC OXIDE;

THERMAL EFFECTS;

EID: 64249170440     PISSN: 15304388     EISSN: 15304388     Source Type: Journal    
DOI: 10.1109/TDMR.2008.916307     Document Type: Article

References (9)

1. R. L. Hoffman, B. J. Norris, and J. F. Wager, "ZnO-based transparent thinfilm transistors," Appl. Phys. Lett., vol. 82, no. 5, pp. 733-735, Feb. 2003.
2. P. F. Carcia, R. S. McLean, M. H. Reilly, and G. Nunes, Jr., "Transparent ZnO thin-film transistor fabricated by RF magnetron sputtering," Appl. Phys. Lett., vol. 82, no. 7, pp. 1117-1119, Feb. 2003.
3. E. Fortunato, P. Barquinha, A. Pimentel, A. Goncalves, A. Marques, L. Pereira, and R. Martins, "Fully transparent ZnO thin-film transistor produced at room temperature," Adv. Mater., vol. 17, no. 5, pp. 590-594, 2005.
4. M. J. Powell, C. Van Berkel, A. R. Franklin, S. C. Deane, and W. I. Milne, "Defect pool in amorphous-silicon thin-film transistors," Phys. Rev. B, Condens. Matter, vol. 45, no. 8, pp. 4160-4170, Feb. 1992.
5. R. B. Werhspohn, S. C. Deane, I. D. French, I. Gale, J. Hewett, and M. J. Powell, "Relative importance of the Si-Si bond and Si-H bond for the stability of amorphous silicon thin film transistors," J. Appl. Phys., vol. 87, no. 1, pp. 144-154, Jan. 2000.
6. R. B. Bergmann, "Crystalline Si thin film solar cells: A review," Appl. Phys., A Mater. Sci. Process., vol. 69, no. 2, pp. 187-194, Aug. 1999.
7. N. L. Dehuff, E. S. Kettenring, D. Hong, H. Q. Chiang, and J. F. Wager, "Transparent thin-film transistors with zinc indium oxide channel layer," J. Appl. Phys., vol. 97, no. 6, pp. 064 505-1-064 505-5, Mar. 2005.
8. C. A. Dimitriadis and P. A. Coxon, "Effects of temperature and electrical stress on the performance of thin-film transistors fabricated from undoped low-pressure chemical vapor deposited polycrystalline silicon," Appl. Phys. Lett., vol. 54, no. 7, pp. 620-623, Feb. 1989.
9. D. K. Dosev, J. Puigdollers, A. Orpella, C. Voz, M. Fonrodona, D. Soler, L. F. Marshal, J. Pallares, J. Bertomeu, J. Andeu, and R. Alcubilla, "Analysis of bias stress on thin-film transistors obtained by hot-wire chemical vapour deposition," Thin Solid Films, vol. 383, no. 1/2, pp. 307-309, Feb. 2001.