Backside circuit edit on full-thickness silicon devices

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 2008, Pages 141-150

  Rue, Chad ^a   Herschbein, Steven ^b   Scrudato, Carmelo ^b  

^a Thermo Fisher Scientific   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 63549111057     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1361/cp2008istfal41     Document Type: Conference Paper

References (12)

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3. th Ed., (2004), pp. 71-75.
4. th Ed., (2004), pp. 42-48.
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7. Silverman, S., Aucoin, R., Mallatt, J., Ehrlich, D., "Laser Microchemical Technology: New Tools for Flip-Chip Debug and Failure Analysis," Proc 23rd International Symposium for Testing and Failure Analysis, Santa Clara, CA, 1997, pp. 211-213.
8. rd Electronics and Components Technology Conference, 2003, pp. 549-553.
9. Sawada, Y., Harada, K., Fujioka, H., "Study of Package Warp Behavior for High-Performance Flip-Chip BGA," Microelectronics Reliability, Vol. 43, Issue 3 (2003), pp. 465-471.
10. S. Herschbein, C. Rue, C. Scrudato, E. Hermann, "FIB Chip Repair: Improving Success by Controlling Beam-Induced Damage and Thermal / Mechanical Stress" Proc 30th International Symposium for Testing and Failure Analysis", Worcester, MA, November, 2004.
11. 2-Enhanced FIB Milling of Silicon," Proc 25th International Symposium for Testing and Failure Analysis, Santa Clara, CA, November, 1999, pp. 255-261.
12. st International Symposium for Testing and Failure Analysis", San Jose, CA, November, 2005, pp. 78-83.