Compact bipolar transistor modeling - Issues and possible solutions

2003 Nanotechnology Conference and Trade Show - Nanotech 2003

Volumn 2, Issue , 2003, Pages 282-285

  Schroter, M ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG COMPUTERS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; EPITAXIAL GROWTH; INTEGRATED CIRCUIT LAYOUT; LITHOGRAPHY; MATHEMATICAL MODELS; OPTIMIZATION; PARAMETER ESTIMATION; SIMULATORS;

CIRCUIT DESIGN; COMPACT MODELING; HIGH FREQUENCY CIRCUITS; MAXIMUM OPERATING SPEED;

BIPOLAR TRANSISTORS;

EID: 6344221640     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)

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