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Volumn 7140, Issue , 2008, Pages

Process capability comparison between LELE DPT and spacer for NAND flash 32nm and below

Author keywords

CD uniformity; Double patterning technology (DPT); Litho etch litho etch (LELE); NAND Flash

Indexed keywords

CD UNIFORMITY; DOUBLE PATTERNING TECHNOLOGY (DPT); ERROR BUDGETS; FILM DEPOSITIONS; GATE LAYERS; LITHO-ETCH-LITHO-ETCH (LELE); MULTIPLE FEATURES; NAND FLASH; OVERLAY ERRORS; PARAMETER VARIATIONS; PATTERN SENSITIVITIES; PROCESS CAPABILITIES; PROCESS FLOWS; SIMULATION EVALUATIONS;

EID: 62449296507     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.808003     Document Type: Conference Paper
Times cited : (6)

References (9)
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    • Finders, J.1
  • 2
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    • The Flash Memory battle: How low can we go ?
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  • 3
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    • Metrology challenges for double exposure and double patterning
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    • Arnold, W.H.1    Dusa, M.V.2    Finders, J.3
  • 4
    • 45449106995 scopus 로고    scopus 로고
    • Towards 3nm overlay and critical dimension uniformity: An integrated error budget for double patterning lithography
    • W. H. Arnold, "Towards 3nm overlay and critical dimension uniformity: an integrated error budget for double patterning lithography", Proc. SPIE Vol.6924, 692404, (2008).
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    • Arnold, W.H.1
  • 5
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    • Pitch Doubling Through Dual Patterning Lithography Challenges in Integration and Litho Budgets
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  • 6
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    • Positive and Negative Tone Double Patterning Lithography for 50nm Flash Memory
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    • Lim, C.M.1
  • 7
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    • Self-aligned double patterning gains NAND Flash Flavor
    • September
    • Chris Bencher, "Self-aligned double patterning gains NAND Flash Flavor", Semiconductor International, September 2008.
    • (2008) Semiconductor International
    • Bencher, C.1
  • 8
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    • The Lithography Technology for the 32nm HP and Beyond
    • M. Dusa et al., "The Lithography Technology for the 32nm HP and Beyond", Proc. SPIE Vol. 7028, 702810, (2008).
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    • Dusa, M.1
  • 9
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    • A Study of CD Budget in Spacer Patterning Technology
    • H. Mukai et al., "A Study of CD Budget in Spacer Patterning Technology", Proc. SPIE Vol. 6924, 692406, (2008).
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    • Mukai, H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.