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Volumn , Issue , 2008, Pages 557-562

Is there always performance overhead for regular fabric?

Author keywords

[No Author keywords available]

Indexed keywords

CHIP AREAS; CMOS CIRCUITS; HIGH DENSITIES; MANUFACTURABILITY; MANUFACTURING PROCESS; POWER DENSITIES; TRANSISTOR ARRAYS;

EID: 62349142652     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2008.4751916     Document Type: Conference Paper
Times cited : (20)

References (15)
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    • Kheterpal, V.1    Strojwas, A.J.2    Pileggi, L.3
  • 2
    • 16244413620 scopus 로고    scopus 로고
    • A metal and via maskset programmable VLSI design methodology using PLAs
    • N. Jayakumar and S. P. Khatri, "A metal and via maskset programmable VLSI design methodology using PLAs," in Proc. Int. Conf. Computer-Aided Design, 2004, pp. 590-594
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    • Jayakumar, N.1    Khatri, S.P.2
  • 3
    • 33644967146 scopus 로고    scopus 로고
    • Designing via-configurable logic blocks for regular fabric
    • January
    • Y. Ran and M. Marek-Sadowska, "Designing via-configurable logic blocks for regular fabric," in IEEE Transactions on VLSI Systems, Vol 14. No. 1, January 2006, pp. 1-14.
    • (2006) IEEE Transactions on VLSI Systems , vol.14 , Issue.1 , pp. 1-14
    • Ran, Y.1    Marek-Sadowska, M.2
  • 4
    • 34547343618 scopus 로고    scopus 로고
    • OPC-free and minimal irregular IC design style
    • W. Maly, Y-W. Lin, and M. Marek-Sadowska, "OPC-free and minimal irregular IC design style," in Proc. DAC, 2007, pp. 954-957.
    • (2007) Proc. DAC , pp. 954-957
    • Maly, W.1    Lin, Y.-W.2    Marek-Sadowska, M.3
  • 5
    • 62349106293 scopus 로고    scopus 로고
    • Integrated Circuit Fabrication and Associated Methods, Devices and Systems
    • U.S. Non-Provisional Patent Application Serial Number CMU Docket 06-091; DMC Docket 06-001PCTCMU
    • W. Maly, "Integrated Circuit Fabrication and Associated Methods, Devices and Systems", U.S. Non-Provisional Patent Application Serial Number CMU Docket 06-091; DMC Docket 06-001PCTCMU.
    • Maly, W.1
  • 7
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    • Pfitzner, A.1
  • 10
    • 0030697661 scopus 로고    scopus 로고
    • Wire segmenting for improved buffer insertion
    • C. Alpert and A. Deygan, "Wire segmenting for improved buffer insertion", in Proc. DAC, 1997, pp. 588-593.
    • (1997) Proc. DAC , pp. 588-593
    • Alpert, C.1    Deygan, A.2
  • 12
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    • May
    • Q. Liu and M. Marek-Sadowska, "A study of netlist structure and placement efficiency," in IEEE Transactions on CAD, Vol 24. No. 5, May 2005, pp. 762-772.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.