DSPs, BRAMs and a pinch of logic: New recipes for AES on FPGAs

Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08

Volumn , Issue , 2008, Pages 99-108

  Drimer, Saar ^a   Güneysu, Tim ^b   Paar, Christof ^b  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS; CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

CLOCK CYCLES; DATA PATHS; EMBEDDED FUNCTIONS; HIGH THROUGHPUTS; LOGIC ELEMENTS; LOOK-UP TABLES; SOURCE CODES;

THROUGHPUT;

EID: 60349118477     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2008.42     Document Type: Conference Paper

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