Self-aligned n-channel GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) using HfO2 and silicon interface passivation layer: Post-metal annealing optimization

Microelectronic Engineering

Volumn 86, Issue 3, 2009, Pages 291-294

  Ok, InJo ^a   Kim, H ^a   Zhang, M ^a   Zhu, F ^a   Park, S ^a   Yum, J ^a   Zhao, H ^a   Lee, Jack C ^a  

^a The University of Texas at Austin   (United States)

Author keywords

GaAs; High k dielectrics; Post metal anneal (PMA); Silicon interface

Indexed keywords

FIELD EFFECT TRANSISTORS; HAFNIUM COMPOUNDS; ION BOMBARDMENT; ION IMPLANTATION; METALS; MOS DEVICES; MOSFET DEVICES; PASSIVATION; PNEUMATIC CONTROL EQUIPMENT; SEMICONDUCTING GALLIUM; SEMICONDUCTING SILICON COMPOUNDS; SUBSTRATES; SURFACE CHEMISTRY; TRANSISTORS;

DIFFERENT SUBSTRATES; ELECTRICAL CHARACTERISTICS; EQUIVALENT-OXIDE THICKNESS; FREQUENCY DISPERSIONS; GAAS; GAAS SUBSTRATES; HIGH TEMPERATURES; HIGH-K DIELECTRICS; IMPLANTATION CONDITIONS; INTERFACE PASSIVATIONS; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS; MOSFETS; N CHANNELS; N-MOSFET; OPTIMIZED PROCESS; P TYPES; POST-METAL ANNEAL (PMA); SELF-ALIGNED; SILICON INTERFACE; TAN/HFO;

GALLIUM ALLOYS;

EID: 59049106181     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2008.09.017     Document Type: Article

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