Techniques to extend canary-based standby v DD scaling for SRAMs to 45 nm and beyond

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 11, 2008, Pages 2514-2523

  Wang, Jiajing ^a   Calhoun, Benton Highsmith ^a  

^a University of Virginia   (United States)

Author keywords

Closed loop; DRV; Low power memory; Reliability; SRAM; Standby V DD scaling; Variation

Indexed keywords

CLOSED LOOP; DRV; LOW-POWER MEMORY; SRAM; STANDBY V DD SCALING; VARIATION;

DATA STORAGE EQUIPMENT; NETWORKS (CIRCUITS); SILICON;

STATIC RANDOM ACCESS STORAGE;

EID: 56849129583     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.2005814     Document Type: Article

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