Shared reconfigurable architectures for CMPS

Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2008, Pages 299-304

  Watkins, Matthew A ^a   Cianchetti, Mark J ^a   Albonesi, David H ^a  

^a Department of Obstetrics Gynecology

Author keywords

[No Author keywords available]

Indexed keywords

AREA COSTS; CHIP MULTIPROCESSORS; EFFICIENT; PEAK POWERS; PERFORMANCE LOSSES; PROGRAMMABLE LOGICS; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE FABRICS; RECONFIGURABLE LOGICS; SHARING POLICIES;

APPLICATIONS; NANOTECHNOLOGY;

FABRICS;

EID: 54949139266     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2008.4629948     Document Type: Conference Paper

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