Scan chain design for three-dimensional integrated circuits (3D ICs)

2007 IEEE International Conference on Computer Design, ICCD 2007

Volumn , Issue , 2007, Pages 208-214

  Wu, Xiaoxia ^a   Falkenstern, Paul ^a   Xie, Yuan ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D ICS; 3-D INTEGRATED CIRCUIT; COMPUTER DESIGNS; DESIGN FOR TESTS; DESIGN TECHNIQUES; IC DESIGNS; INTERNATIONAL CONFERENCES; ISCAS89 BENCHMARK; SCAN CHAIN CONSTRUCTION; SCAN CHAIN DESIGN; SCAN CHAIN ORDERING; SCAN CHAINS; TECHNOLOGY SCALING; TEST ABILITY; THREE DIMENSIONAL (3D); THREE-DIMENSIONAL INTEGRATED CIRCUITS; WIRE LENGTHS;

ELECTRONICS INDUSTRY; SCANNING; TECHNOLOGY; THREE DIMENSIONAL; WIRE;

INTEGRATED CIRCUITS;

EID: 52949146354     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2007.4601902     Document Type: Conference Paper

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