-
1
-
-
0033682046
-
Obeying Moore's Law beyond 0.18 Micron
-
S. Borkar, "Obeying Moore's Law beyond 0.18 Micron" Proc. ASIC/SOC Conf., 2000, pp. 26-31.
-
(2000)
Proc. ASIC/SOC Conf.
, pp. 26-31
-
-
Borkar, S.1
-
2
-
-
0029207481
-
Performance Trends in High-end Processors
-
Jan
-
G. A. Sai-Halasz, "Performance Trends in High-end Processors." Proc. IEEE, vol. 83, no. 1, pp. 20-36, Jan. 1995.
-
(1995)
Proc. IEEE
, vol.83
, Issue.1
, pp. 20-36
-
-
Sai-Halasz, G.A.1
-
3
-
-
0035704586
-
Optimal n-tier Multilevel Interconnect Architectures for Gigascale Integration (GSI)
-
Dec
-
R. Venkatesan, J. A. Davis, K. A. Bowman, J. D. Meindl, "Optimal n-tier Multilevel Interconnect Architectures for Gigascale Integration (GSI)," IEEE Trans. VLSI Sys., vol.9, no.6, pp. 899-912, Dec. 2001.
-
(2001)
IEEE Trans. VLSI Sys.
, vol.9
, Issue.6
, pp. 899-912
-
-
Venkatesan, R.1
Davis, J.A.2
Bowman, K.A.3
Meindl, J.D.4
-
4
-
-
85001141006
-
Thermal Analysis of Three-dimensional (3-D) Integrated Circuits (ICs)
-
A. Rahman, R. Reif, "Thermal Analysis of Three-dimensional (3-D) Integrated Circuits (ICs)," Intl. Interconnect Tech. Conf. (IITC), 2001, pp. 157-159.
-
(2001)
Intl. Interconnect Tech. Conf. (IITC)
, pp. 157-159
-
-
Rahman, A.1
Reif, R.2
-
5
-
-
0029292398
-
Low Power Microelectronics: Retrospect and Prospect
-
April
-
J. D. Meindl, "Low Power Microelectronics: Retrospect and Prospect," Proc. IEEE, vol. 83, no. 4, pp. 619-635, April 1995.
-
(1995)
Proc. IEEE
, vol.83
, Issue.4
, pp. 619-635
-
-
Meindl, J.D.1
-
6
-
-
0032289141
-
-
Century Gigascale Integration (GSI), Materials Research Society, April
-
J. D. Meindl, "Interconnection Limits on XXI Century Gigascale Integration (GSI)," Materials Research Society, April 1998, pp. 3-9.
-
(1998)
Interconnection Limits on XXI
, pp. 3-9
-
-
Meindl, J.D.1
-
9
-
-
0035707480
-
Impact of Three-dimensional Architectures on Interconnects in Gigascale Integration
-
Dec
-
J. W. Joyner, R. Venkatesan, P. Zarkesh-Ha, J. A. Davis, J. D. Meindl, "Impact of Three-dimensional Architectures on Interconnects in Gigascale Integration," IEEE Trans. VLSI Sys., vol.9, no.6, pp. 922-928, Dec. 2001.
-
(2001)
IEEE Trans. VLSI Sys.
, vol.9
, Issue.6
, pp. 922-928
-
-
Joyner, J.W.1
Venkatesan, R.2
Zarkesh-Ha, P.3
Davis, J.A.4
Meindl, J.D.5
-
10
-
-
0034462309
-
System-level Performance Evaluation of Three-dimensional Integrated Circuits
-
Dec
-
A. Rahman, R. Reif, "System-level Performance Evaluation of Three-dimensional Integrated Circuits," IEEE Trans. VLSI Sys., vol.8, no.6, pp. 671-678, Dec. 2000.
-
(2000)
IEEE Trans. VLSI Sys.
, vol.8
, Issue.6
, pp. 671-678
-
-
Rahman, A.1
Reif, R.2
-
11
-
-
33747566850
-
3D-ICs: A Novel Chip Design for Improving Deep-Submicrometer Interconnect Performance and Systems-on-a-Chip Integration
-
May
-
K. Banerjee, S. J. Souri, P. Kapur, K. C. Saraswat, "3D-ICs: A Novel Chip Design for Improving Deep-Submicrometer Interconnect Performance and Systems-on-a-Chip Integration." Proc. IEEE, vol. 89, no. 5, pp. 602-633, May 2001.
-
(2001)
Proc. IEEE
, vol.89
, Issue.5
, pp. 602-633
-
-
Banerjee, K.1
Souri, S.J.2
Kapur, P.3
Saraswat, K.C.4
-
12
-
-
0015206785
-
On a Pin Versus Block Relationship For Partitions of Logic Graphs
-
Dec
-
B. S. Landman, R. L. Russo, "On a Pin Versus Block Relationship For Partitions of Logic Graphs," IEEE Trans. Comput., vol C-20, pp. 1469-1479, Dec. 1971.
-
(1971)
IEEE Trans. Comput.
, vol.C-20
, pp. 1469-1479
-
-
Landman, B.S.1
Russo, R.L.2
-
13
-
-
0034459842
-
The Interpretation and Application of Rent's Rule
-
Dec
-
P. Christie, D. Stroobandt, "The Interpretation and Application of Rent's Rule," IEEE Trans. VLSI Systems, vol. 8, no. 6, pp. 639-648, Dec. 2000.
-
(2000)
IEEE Trans. VLSI Systems
, vol.8
, Issue.6
, pp. 639-648
-
-
Christie, P.1
Stroobandt, D.2
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