메뉴 건너뛰기




Volumn , Issue , 2008, Pages 381-386

Standard cell like via-configurable logic block for structured ASICs

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CELLS; ELECTRIC BATTERIES; ELECTRIC POWER SUPPLIES TO APPARATUS; FABRICS; METALS; OPTICAL DESIGN; STANDARDS; TECHNOLOGY;

EID: 51849126472     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2008.50     Document Type: Conference Paper
Times cited : (20)

References (18)
  • 2
    • 0344551047 scopus 로고    scopus 로고
    • Structured ASICs: Opportunities and challenges
    • B. Zahiri, "Structured ASICs: opportunities and challenges," ICCD, 2003, pp. 404-409.
    • (2003) ICCD , pp. 404-409
    • Zahiri, B.1
  • 3
    • 2942644083 scopus 로고    scopus 로고
    • structured ASIC, evolution or revolution?
    • K. C. Wu, Y. W. Tsai, "structured ASIC, evolution or revolution?" ISPD, pp.103-106, 2004.
    • (2004) ISPD , pp. 103-106
    • Wu, K.C.1    Tsai, Y.W.2
  • 6
    • 0038040153 scopus 로고    scopus 로고
    • An architectural exploration of via patterned gate arrays
    • C. Patel, A. Cozzie, H. Schmit, and L. Pileggi, "An architectural exploration of via patterned gate arrays," ISPD, 2003, pp. 184-189
    • (2003) ISPD , pp. 184-189
    • Patel, C.1    Cozzie, A.2    Schmit, H.3    Pileggi, L.4
  • 7
    • 33644967146 scopus 로고    scopus 로고
    • Designing via-configurable logic blocks for regular fabric
    • Jan
    • Y. Ran and M. Marek-Sadowska, "Designing via-configurable logic blocks for regular fabric", IEEE Trans. on VLSI Systems, Vol. 14, No. 1, Jan. 2006.
    • (2006) IEEE Trans. on VLSI Systems , vol.14 , Issue.1
    • Ran, Y.1    Marek-Sadowska, M.2
  • 8
    • 35248837471 scopus 로고    scopus 로고
    • Heterogeneous logic block architectures for via-patterned programmable fabrics
    • A. Koorapaty, L. Pileggi, and H. Schmit, "Heterogeneous logic block architectures for via-patterned programmable fabrics," LNCS 2778, 2003, pp. 426-436.
    • (2003) LNCS , vol.2778 , pp. 426-436
    • Koorapaty, A.1    Pileggi, L.2    Schmit, H.3
  • 9
    • 33750582903 scopus 로고    scopus 로고
    • Via-configurable routing architectures and fast design mappability estimation for regular fabrics
    • Sept
    • Y. Ran and M. Marek-Sadowska, "Via-configurable routing architectures and fast design mappability estimation for regular fabrics," IEEE Trans. on VLSI Systems, Vol. 14, Sept. 2006, pp. 998-1009.
    • (2006) IEEE Trans. on VLSI Systems , vol.14 , pp. 998-1009
    • Ran, Y.1    Marek-Sadowska, M.2
  • 10
    • 34047133419 scopus 로고    scopus 로고
    • FlexASIC structured array: A solution to the DSM challenge
    • A. Levinthal and R. Herveille, "FlexASIC structured array: a solution to the DSM challenge," DesignCon 2005.
    • (2005) DesignCon
    • Levinthal, A.1    Herveille, R.2
  • 12
    • 2942659249 scopus 로고    scopus 로고
    • Design considerations for regular fabrics
    • April 18-21
    • D. D. Sherlekar, "Design considerations for regular fabrics," ISPD, April 18-21,2004, pp.97-102.
    • (2004) ISPD , pp. 97-102
    • Sherlekar, D.D.1
  • 13
    • 3042611828 scopus 로고    scopus 로고
    • Exploring logic block granularity for regular fabrics
    • A. Koorapaty, et al. "Exploring logic block granularity for regular fabrics," DATE, 2004, pp. 1468-473.
    • (2004) DATE , pp. 1468-1473
    • Koorapaty, A.1
  • 14
    • 51849122362 scopus 로고    scopus 로고
    • White paper, RapidChip technology: fast custom silicon through platform-based design, LSI Logic, 2004.
    • White paper, "RapidChip technology: fast custom silicon through platform-based design," LSI Logic, 2004.
  • 15
    • 2942654761 scopus 로고    scopus 로고
    • Design methodology and tools for NEC electronics' structured ASIC ISSP
    • T. Okamoto, T. Kimoto, N. Maeda, "Design methodology and tools for NEC electronics' structured ASIC ISSP," ISPD, 2004, pp.90-96.
    • (2004) ISPD , pp. 90-96
    • Okamoto, T.1    Kimoto, T.2    Maeda, N.3
  • 16
    • 0038042049 scopus 로고    scopus 로고
    • PLA-based regular structures and their synthesis
    • June
    • F. Mo, R. Brayton, "PLA-based regular structures and their synthesis," IEEE Trans. on TCAD, Vol. 22, No. 6, June 2003, pp.723 - 729.
    • (2003) IEEE Trans. on TCAD , vol.22 , Issue.6 , pp. 723-729
    • Mo, F.1    Brayton, R.2
  • 17
    • 51849128629 scopus 로고    scopus 로고
    • An Automatic Library Development System,
    • Master Thesis, Yuan Ze University, Taiwan, June
    • Shu-Ren Ker, "An Automatic Library Development System," Master Thesis, Yuan Ze University, Taiwan, June 1997.
    • (1997)
    • Ker, S.-R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.