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Volumn , Issue , 2003, Pages 800-805

Wire length prediction based clustering and its application in placement

Author keywords

Clustering; Placement; Wire length prediction

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER AIDED ENGINEERING; INTERCONNECTION NETWORKS;

EID: 0042635590     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/775832.776035     Document Type: Conference Paper
Times cited : (41)

References (19)
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  • 7
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    • A wire length estimation technique utilizing neighborhood density equations
    • August
    • T. Hamada, C.K. Cheng and P.M. Chau, "A wire length estimation technique utilizing neighborhood density equations", IEEE Trans. on Computer-Aided Design, vol. 15. pp. 912-922, August 1996.
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    • Hamada, T.1    Cheng, C.K.2    Chau, P.M.3
  • 9
    • 0029701108 scopus 로고    scopus 로고
    • Standard cell interconnect length predication from structural circuit attributes
    • H.T. Heineken and W. Maly, "Standard Cell Interconnect Length Predication from Structural Circuit Attributes", Proc. Custom Integrated Circuits Conference, pp. 167-170, 1996.
    • (1996) Proc. Custom Integrated Circuits Conference , pp. 167-170
    • Heineken, H.T.1    Maly, W.2
  • 11
    • 84969784748 scopus 로고
    • When clusters meet partitions: New density-based methods for circuit decomposition
    • D.J. Huang and A.B. Kahng, "When clusters meet partitions: new density-based methods for circuit decomposition", Proc. DATE, pp. 60-64, 1995.
    • (1995) Proc. DATE , pp. 60-64
    • Huang, D.J.1    Kahng, A.B.2
  • 12
    • 0024914707 scopus 로고
    • Interconnection length estimation for optimized standard cell layouts
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    • Pedram, M.1    Preas, B.T.2
  • 13
    • 0027839107 scopus 로고
    • A timing driven n-way chip and multi-chip partitioner
    • K. Roy and C. Sechen, "A timing driven n-way chip and multi-chip partitioner,", In Proc. Int. Conf. Computer-Aided Design, 1993, pp 240-247.
    • (1993) Proc. Int. Conf. Computer-Aided Design , pp. 240-247
    • Roy, K.1    Sechen, C.2
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    • Efficient and effective placement for very large circuits
    • W. Sun and C. Sechen, "Efficient and Effective Placement for Very Large Circuits", Proc. IEEE ICCAD, 1993, pp. 170-177.
    • (1993) Proc. IEEE ICCAD , pp. 170-177
    • Sun, W.1    Sechen, C.2
  • 16
    • 0034477836 scopus 로고    scopus 로고
    • Dragon2000: Standard-cell placement tool for large industry circuits
    • M. Wang, X. Yang and M. Sarrafzadeh, "Dragon2000: Standard-cell Placement Tool for Large Industry Circuits,", Proc. ICCAD, pp. 260-264, 2000.
    • (2000) Proc. ICCAD , pp. 260-264
    • Wang, M.1    Yang, X.2    Sarrafzadeh, M.3
  • 18
    • 0041691432 scopus 로고    scopus 로고
    • IBM-place benchmarks
    • IBM-place benchmarks: http://gigascale.org/bookshelf/.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.