Exploring regular fabrics to optimize the performance-cost trade-off

Proceedings - Design Automation Conference

Volumn , Issue , 2003, Pages 782-787

  Pileggi, L ^a   Schmit, H ^a   Strojwas, A J ^a   Gopalakrishnan, P ^a   Kheterpal, V ^a   Koorapaty, A ^a   Patel, C ^a   Rovner, V ^a   Tong, K Y ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Cost; Integrated Circuits; Performance; Regularity

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS; NANOTECHNOLOGY; RELIABILITY; VLSI CIRCUITS;

GATE ARRAYS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0042635594     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/776028.776031     Document Type: Conference Paper

References (10)

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