Test compaction for mixed-signal circuits using pass-fail test data

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2008, Pages 299-308

  Biswas, Sounil ^a   Blanton, R D ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Boolean minimization; Minimum constrained subset cover; Mixed signal test; Pass fail test data; Test compaction

Indexed keywords

BOOLEAN MINIMIZATION; MINIMUM CONSTRAINED SUBSET COVER; MIXED-SIGNAL TEST; PASS-FAIL TEST DATA; TEST COMPACTION;

ERROR ANALYSIS; PHASE LOCKED LOOPS; STEEL POWDER METALLURGY; TEST FACILITIES;

TESTING;

EID: 51449083591     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2008.35     Document Type: Conference Paper

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