Evaluating the model accuracy in automated design space exploration

Microprocessors and Microsystems

Volumn 32, Issue 5-6, 2008, Pages 321-329

  Holma, Kalle ^a   Setälä, Mikko ^b   Salminen, Erno ^a   Hännikäinen, Marko ^a   Hämäläinen, Timo D ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

^b Sasken Finland Oy   (Finland)

Author keywords

Accuracy; Communication costs; Design space exploration; System on chip

Indexed keywords

ABSTRACTING; CIRCUIT SIMULATION; COMMUNICATION; MODEL STRUCTURES; SPACE RESEARCH; UNIFIED MODELING LANGUAGE;

ABSTRACTED MODELS; ABSTRACTION MODELS; APPLIED (CO); AUTOMATED DESIGN; AVERAGE ERRORS; COMMUNICATING TASKS; COMMUNICATION COSTS; CYCLE-ACCURATE SIMULATION; DESIGN SPACE EXPLORATION (DSE); DESIGN TIME; ELSEVIER (CO); FRAMES PER SECOND (FPS); MODEL ACCURACY; MULTI LEVEL (ML); MULTI PROCESSOR SOC; PROBABILISTIC MODEL (PM); SIMULATION ENGINES; SIMULATION SPEED; SYSTEM MODELLING; SYSTEM ON CHIPS (SOCS); UNIFIED MODELING LANGUAGE (UML);

COMPUTER SIMULATION LANGUAGES;

EID: 50949112990     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2008.03.011     Document Type: Article

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