Thermally-induced soft errors in nanoscale CMOScircuits

2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH

Volumn , Issue , 2007, Pages 62-69

  Li, H ^a   Mundy, J ^a   Patterson, W ^a   Kazazis, D ^a   Zaslavsky, A ^a   Bahar, R I ^a  

^a Brown University   (United States)

Author keywords

Birth death queue; Flip flop; Noise; Soft errors

Indexed keywords

CMOS INTEGRATED CIRCUITS; ERROR CORRECTION; FLIP FLOP CIRCUITS; INTELLIGENT SYSTEMS; MONTE CARLO METHODS; NANOTECHNOLOGY; RADIATION HARDENING; THRESHOLD VOLTAGE;

BIRTH-DEATH QUEUE; ELECTRICAL NOISE; FLIP-FLOP DESIGNS; NOISE; SOFT ERROR; THEORETICAL MODELING; THERMALLY INDUCED; THRESHOLD VOLTAGE VARIATION;

PROBABILITY DISTRIBUTIONS;

EID: 50849091941     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANOARCH.2007.4400859     Document Type: Conference Paper

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