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Volumn , Issue , 2007, Pages 673-676

A 10-bit, 1.8-GS/s time-interleaved pipeline ADC

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; PIPELINES;

EID: 50649110026     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2007.4511081     Document Type: Conference Paper
Times cited : (3)

References (12)
  • 1
    • 0035058178 scopus 로고    scopus 로고
    • A 6 b 1.1 GSample/s CMOS A/D converter
    • Feb
    • G. Geelen, "A 6 b 1.1 GSample/s CMOS A/D converter" IEEE Int. Solid-State Circuits Conf., Feb. 2001, pp. 128-129.
    • (2001) IEEE Int. Solid-State Circuits Conf , pp. 128-129
    • Geelen, G.1
  • 2
    • 0036917305 scopus 로고    scopus 로고
    • P.C.S. Scholtens and M. Vertregt, A 6-b 1.6-Gsample/s flash ADC in 0.18-μm CMOS using averaging termination, Solid-State Circuits, IEEE Journal of, 37, Dec.2002, pp. 1599-1609.
    • P.C.S. Scholtens and M. Vertregt, "A 6-b 1.6-Gsample/s flash ADC in 0.18-μm CMOS using averaging termination, " Solid-State Circuits, IEEE Journal of, vol. 37, Dec.2002, pp. 1599-1609.
  • 3
    • 70449501804 scopus 로고    scopus 로고
    • A 90nm CMOS 1.2v 6b 1GS/s two-step subranging ADC
    • Feb
    • P.M. Figueiredo et al. "A 90nm CMOS 1.2v 6b 1GS/s two-step subranging ADC," IEEE Int. Solid-State Circuits Conf., Feb 2006, pp 2320-2329.
    • (2006) IEEE Int. Solid-State Circuits Conf , pp. 2320-2329
    • Figueiredo, P.M.1
  • 4
    • 10444248089 scopus 로고    scopus 로고
    • R.C. Taft, C.A. Menkus,; M.R.Tursi, O. Hidri, and V Pons, A 1.8-V 1.6-GSample/s 8-b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency, Solid-State Circuits, IEEE Journal of, 39, Dec.2004, pp. 2107-2115.
    • R.C. Taft, C.A. Menkus,; M.R.Tursi, O. Hidri, and V Pons, "A 1.8-V 1.6-GSample/s 8-b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency, " Solid-State Circuits, IEEE Journal of, vol. 39, Dec.2004, pp. 2107-2115.
  • 5
    • 0742321272 scopus 로고    scopus 로고
    • F. Vessal andd C. A. T. Salama, An 8-bit 2-Gsample/s folding-interpolating analog-to-digital converter in SiGe, Solid-State Circuits, IEEE Journal of, 39, Jan 2004, pp. 238-241.
    • F. Vessal andd C. A. T. Salama, "An 8-bit 2-Gsample/s folding-interpolating analog-to-digital converter in SiGe," Solid-State Circuits, IEEE Journal of, vol. 39, Jan 2004, pp. 238-241.
  • 6
    • 33845604986 scopus 로고    scopus 로고
    • S. K. Gupta, M. A. Inerfield, and J. Wang, A 1-GS/s 11-bit ADC With 55-dB SNDR, 250-mW Power Realized by a High Bandwidth Scalable Time-Interleaved Architecture, Solid-State Circuits, IEEE Journal of, 41, Dec. 2006, pp. 2650-2657.
    • S. K. Gupta, M. A. Inerfield, and J. Wang, "A 1-GS/s 11-bit ADC With 55-dB SNDR, 250-mW Power Realized by a High Bandwidth Scalable Time-Interleaved Architecture," Solid-State Circuits, IEEE Journal of, vol. 41, Dec. 2006, pp. 2650-2657.
  • 8
    • 33847273782 scopus 로고    scopus 로고
    • A DLL clock generator for a high speed A/D-converter with 1 ps jitter and skew calibrator with 1 ps accuracy in 0.35 μm CMOS
    • A Rantala, D. G. Martins, M. Aberg, "A DLL clock generator for a high speed A/D-converter with 1 ps jitter and skew calibrator with 1 ps accuracy in 0.35 μm CMOS," Norchip Conf., 2005,pp. 114 - 117.
    • (2005) Norchip Conf , pp. 114-117
    • Rantala, A.1    Martins, D.G.2    Aberg, M.3
  • 10
  • 11
    • 0037630792 scopus 로고    scopus 로고
    • A 20 GS/s 8b ADC witn a 1MB Memory in 0.18-μm CMOS
    • K. Poulton et al."A 20 GS/s 8b ADC witn a 1MB Memory in 0.18-μm CMOS," IEEE Int. Solid-State Circuits Conf., 2003, pp. 318-319.
    • (2003) IEEE Int. Solid-State Circuits Conf , pp. 318-319
    • Poulton, K.1
  • 12
    • 0036913528 scopus 로고    scopus 로고
    • R. Farjad-Rad et al., A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips, Solid-State Circuits, IEEE Journal of, 37, Dec 2002 pp. 1804 - 1812.
    • R. Farjad-Rad et al., "A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips," Solid-State Circuits, IEEE Journal of, Vol. 37, Dec 2002 pp. 1804 - 1812.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.