Finite element analysis and analytical simulations of Suspended Gate-FET for ultra-low power inverters

Solid-State Electronics

Volumn 52, Issue 9, 2008, Pages 1374-1381

  Tsamados, Dimitrios ^a   Singh Chauhan, Yogesh ^a,c   Eggimann, Christoph ^a   Akarvardar, Kerem ^b   Philip Wong, H S ^b   Mihai Ionescu, Adrian ^a  

^a EPFL   (Switzerland)

^b Stanford University   (United States)

^c IBM RESEARCH INDIA   (India)

Author keywords

Computational modeling and simulation; Low power; MEMS NEMS; Micro electro mechanical switch; Suspended Gate Field Effect Transistor

Indexed keywords

COMPUTER SIMULATION; FINITE ELEMENT METHOD; MESFET DEVICES;

ANALYTICAL SIMULATIONS; COMPUTATIONAL MODELING AND SIMULATION; FINITE ELEMENT ANALYSIS; LOW POWER; MEMS/NEMS; MICRO-ELECTRO-MECHANICAL SWITCH; NUMERICAL SIMULATIONS; SUSPENDED GATE; SUSPENDED GATE-FIELD-EFFECT TRANSISTOR; ULTRA-LOW-POWER;

FIELD EFFECT TRANSISTORS;

EID: 50349099929     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2008.04.013     Document Type: Article

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