-
1
-
-
46049088349
-
3 - TaN) Cell Technology
-
3 - TaN) Cell Technology" IEDM Tech. Dig., pp.29-32, 2006.
-
(2006)
IEDM Tech. Dig
, pp. 29-32
-
-
Park, Y.1
Choi, J.2
Kang, C.3
Lee, C.4
Shin, Y.5
Choi, B.6
Kim, J.7
Jeon, S.8
Sel, J.9
Park, J.10
Choi, K.11
Yoo, T.12
Sim, J.13
Kim, K.14
-
2
-
-
48649089357
-
New Punch-through Assisted Hot Holes Programming Mechanism for Reliable SONOS FLASH Memories with Thick Tunnel Oxide
-
N. Akil, M. Van Duuren, D. S. Golubovic, M. Boutchich and R. van Schajik, "New Punch-through Assisted Hot Holes Programming Mechanism for Reliable SONOS FLASH Memories with Thick Tunnel Oxide", Proc . NVSMW 2007, pp.92-93.
-
(2007)
Proc . NVSMW
, pp. 92-93
-
-
Akil, N.1
Van Duuren, M.2
Golubovic, D.S.3
Boutchich, M.4
van Schajik, R.5
-
3
-
-
48549083422
-
Advanced high - K/metal gate charge trapping memories for post-45 nm node
-
D. S. Golubović, M. Boutchich, N. Akil and M. J. van Duuren, "Advanced high - K/metal gate charge trapping memories for post-45 nm node", Proc. NVMTS, pp.15-19, 2007.
-
(2007)
Proc. NVMTS
, pp. 15-19
-
-
Golubović, D.S.1
Boutchich, M.2
Akil, N.3
van Duuren, M.J.4
-
4
-
-
48649083671
-
Investigation of Reliability Characteristics of Si Nanocrystal NOR Memory Arrays
-
S. Jacob, L. Perniola, G. Festes, S. Bodnar, R. Coppard, J. F. Thiery, T. Pedron, E. Jalaguier, F. Boulanger, B. De Salvo and S. Deleonibus, "Investigation of Reliability Characteristics of Si Nanocrystal NOR Memory Arrays", Proc. NVSMW 2007, pp.71-72.
-
(2007)
Proc. NVSMW
, pp. 71-72
-
-
Jacob, S.1
Perniola, L.2
Festes, G.3
Bodnar, S.4
Coppard, R.5
Thiery, J.F.6
Pedron, T.7
Jalaguier, E.8
Boulanger, F.9
De Salvo, B.10
Deleonibus, S.11
-
5
-
-
33751038528
-
A 90nm Embedded 2-Bit Per Cell Nanocrystal Flash EEPROM
-
E. J. Prinz, J. Yater, R. Steimle, M. Sadd, C. Swift and Ko-Min Chang, "A 90nm Embedded 2-Bit Per Cell Nanocrystal Flash EEPROM", Proc. NVSMW 2006, pp.62-63.
-
(2006)
Proc. NVSMW
, pp. 62-63
-
-
Prinz, E.J.1
Yater, J.2
Steimle, R.3
Sadd, M.4
Swift, C.5
Chang, K.-M.6
-
6
-
-
27744491056
-
Optimization of threshold voltage window under tunneling program/erase in nanocrystal memories
-
C. M. Compagnoni, D. Ielmini, A. S. Spinelli and A. L. Lacaita, "Optimization of threshold voltage window under tunneling program/erase in nanocrystal memories", IEEE Trans. on Elec. Dev., 52, 11, pp.2473-2481, 2005.
-
(2005)
IEEE Trans. on Elec. Dev
, vol.52
, Issue.11
, pp. 2473-2481
-
-
Compagnoni, C.M.1
Ielmini, D.2
Spinelli, A.S.3
Lacaita, A.L.4
-
7
-
-
50249122655
-
Thorough investigation of Si-nanocrystal memories with high-k interpoly dielectrics for sub-45nm node Flash NAND applications
-
G. Molas, M. Bocquet, J. Buckley, J. P. Colonna, L. Masarotto, H. Grampeix, F. Martin, V. Vidal, A. Toffoli, P. Brianceau, L. Vermande, P. Scheiblin, M. Gély, A. M. Papon, G. Auvert, L. Perniola, C. Licitra, T. Veyron, N. Rochat, C. Bongiorno, S. Lombardo, B. De Salvo and S. Deleonibus, "Thorough investigation of Si-nanocrystal memories with high-k interpoly dielectrics for sub-45nm node Flash NAND applications",.IEDM Tech. Dig., pp.453-456, 2007.
-
(2007)
IEDM Tech. Dig
, pp. 453-456
-
-
Molas, G.1
Bocquet, M.2
Buckley, J.3
Colonna, J.P.4
Masarotto, L.5
Grampeix, H.6
Martin, F.7
Vidal, V.8
Toffoli, A.9
Brianceau, P.10
Vermande, L.11
Scheiblin, P.12
Gély, M.13
Papon, A.M.14
Auvert, G.15
Perniola, L.16
Licitra, C.17
Veyron, T.18
Rochat, N.19
Bongiorno, C.20
Lombardo, S.21
De Salvo, B.22
Deleonibus, S.23
more..
-
8
-
-
36248940243
-
Investigation of hafnium-aluminate alloys in view of integration as interpoly dielectrics of future Flash memories
-
G. Molas, M. Bocquet, J. Buckley, H. Grampeix, M. Gély, J. P. Colonna, C. Licitra, N. Rochat, T. Veyront, X. Garros, F. Martin, P. Brianceau, V. Vidal, C. Bongiorno, S. Lombardo, B. De Salvo, S. Deleonibus, «Investigation of hafnium-aluminate alloys in view of integration as interpoly dielectrics of future Flash memories», Solid State Electronics, Vol 51/11-12, pp.1540-1546, 2007.
-
(2007)
Solid State Electronics
, vol.51
, Issue.11-12
, pp. 1540-1546
-
-
Molas, G.1
Bocquet, M.2
Buckley, J.3
Grampeix, H.4
Gély, M.5
Colonna, J.P.6
Licitra, C.7
Rochat, N.8
Veyront, T.9
Garros, X.10
Martin, F.11
Brianceau, P.12
Vidal, V.13
Bongiorno, C.14
Lombardo, S.15
De Salvo, B.16
Deleonibus, S.17
-
9
-
-
39549085553
-
Integration of CVD silicon nanocrystals in a 32Mb NOR flash memory
-
S. Jacob, G. Festes, S. Bodnar, R. Coppard, J. F. Thiery, T. Pate-Cazal, T. Pedron, B. De Salvo, L. Perniola, E. Jalaguier, F. Boulanger and S. Deleonibus, "Integration of CVD silicon nanocrystals in a 32Mb NOR flash memory", Proc. ESSDERC 2007, pp.410-413.
-
(2007)
Proc. ESSDERC
, pp. 410-413
-
-
Jacob, S.1
Festes, G.2
Bodnar, S.3
Coppard, R.4
Thiery, J.F.5
Pate-Cazal, T.6
Pedron, T.7
De Salvo, B.8
Perniola, L.9
Jalaguier, E.10
Boulanger, F.11
Deleonibus, S.12
|