Enhancing design robustness with reliability-aware resynthesis and logic simulation

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2007, Pages 149-154

  Krishnaswamy, Smita ^a   Plaza, Stephen M ^a   Markov, Igor L ^a   Hayes, John P ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; ERROR ANALYSIS; ERROR CORRECTION; ERRORS; MICROPROCESSOR CHIPS;

AREA OVERHEAD; CIRCUIT DENSITIES; COMPUTER-AIDED DESIGN; DESIGN ROBUSTNESS; IC TECHNOLOGIES; INTERNATIONAL CONFERENCES; KEY FEATURE; LOGIC SIMULATIONS; MINIMAL AREA; ORDERS-OF-MAGNITUDE; POWER OVERHEAD; RESYNTHESIS; SOFT ERRORS; SOFT-ERROR RATE; SYNTHESIS METHODS;

LOGIC CIRCUITS;

EID: 50249171831     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2007.4397258     Document Type: Conference Paper

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