Parasitic aware process variation tolerant voltage controlled oscillator (VCO) design

Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008

Volumn , Issue , 2008, Pages 330-333

  Ghai, Dhruva ^a   Mohanty, Saraju P ^a   Kougianos, Elias ^a  

^a UNIVERSITY OF NORTH TEXAS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; CASE STUDIES; ELECTRONIC DESIGNS; EXTRACTED CIRCUIT; FREQUENCY OF OSCILLATION; INTERNATIONAL SYMPOSIUM; METAL PROCESSING; NANOSCALE CIRCUITS; OBJECTIVE FUNCTION; OPTIMIZATION METHODOLOGY; OSCILLATION FREQUENCIES; PERFORMANCE DEGRADATION; PHYSICAL DESIGNS; PROCESS VARIATIONS; SALICIDE; VOLTAGE-CONTROLLED OSCILLATOR; WORST CASE;

CMOS INTEGRATED CIRCUITS; DEGRADATION; ELECTRONICS ENGINEERING; METALS; NETWORKS (CIRCUITS); PROCESS DESIGN; PROCESS ENGINEERING; SMELTING; SULFATE MINERALS; VARIABLE FREQUENCY OSCILLATORS;

PROCESS CONTROL;

EID: 49849095737     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2008.4479750     Document Type: Conference Paper

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