Generating FPGA-accelerated DFT libraries

Proceedings 2007 IEEE Symposium on Field-Programme Custom Computing Machines, FCCM 2007

Volumn , Issue , 2007, Pages 173-184

  D'Alberto, Paolo ^a   Milder, Peter A ^b   Sandryhaila, Aliaksei ^b   Franchetti, Franz ^b   Hoe, James C ^b   Moura, José M F ^b   Püschel, Markus ^b   Johnson, Jeremy R ^c  

^a YAHOO INC   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c Drexel University

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC PROGRAMMING; COMPUTER HARDWARE; DISCRETE FOURIER TRANSFORMS; ENERGY EFFICIENCY; LIBRARIES;

ALGORITHMIC STRUCTURE; AUTOMATIC IMPLEMENTATION; DIVIDE AND CONQUER; HIGH-PERFORMANCE HARDWARE; LINEAR TRANSFORM; PARTITIONING STRATEGIES; POWERPC PROCESSORS; RECONFIGURABLE FABRICS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 47349126095     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2007.58     Document Type: Conference Paper

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