|
Volumn , Issue , 2005, Pages 471-474
|
Automatic generation of customized discrete Fourier transform IPs
|
Author keywords
Design generator; Discrete Fourier transform; FPGA; IP
|
Indexed keywords
COST EFFECTIVENESS;
DIGITAL SIGNAL PROCESSING;
DISCRETE FOURIER TRANSFORMS;
FIELD PROGRAMMABLE GATE ARRAYS;
HARDWARE;
OPTIMIZATION;
RESOURCE ALLOCATION;
DESIGN GENERATOR;
IP;
TIME-SAVING RESOURCES;
NETWORK PROTOCOLS;
|
EID: 27944481292
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/dac.2005.193855 Document Type: Conference Paper |
Times cited : (56)
|
References (6)
|