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1
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0041589141
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A 33 GHz 2:1 Static Frequency Divider in 0.12-μ m SOI CMOS Operable at 2.7mW
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June
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Jean-Olivier Plouchart, Jonghae Kim, Hector Recoules, Noah Zamdmer, Yue Tan, Melanie Sherony, Asit Ray, and Lawrence Wagner "A 33 GHz 2:1 Static Frequency Divider in 0.12-μ m SOI CMOS Operable at 2.7mW," IEEE RFIC 2003 Dig., pp. 329 - 332, June 2003.
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(2003)
IEEE RFIC 2003 Dig
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Plouchart, J.-O.1
Kim, J.2
Recoules, H.3
Zamdmer, N.4
Tan, Y.5
Sherony, M.6
Ray, A.7
Wagner, L.8
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2
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34548829447
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Performance Variations of a 66GHz Static CML Divider in a 90nm CMOS
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Feb
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Jean-Olivier Plouchart, Jonghae Kim, Victor Karam, Robert Trzcinski, and Jeff Gross, "Performance Variations of a 66GHz Static CML Divider in a 90nm CMOS," IEEE ISSCC 2006 Dig., pp. 526-527, Feb. 2006.
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(2006)
IEEE ISSCC 2006 Dig
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Plouchart, J.-O.1
Kim, J.2
Karam, V.3
Trzcinski, R.4
Gross, J.5
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3
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38949156497
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Performance Variability of a 90GHz CML Frequency Divider in a 65nm SOI CMOS
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Feb
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Daihyun Lim, Jonghae Kim, Jean-Olivier Plouchart, Robert Trzcinski, and Duane Boning, "Performance Variability of a 90GHz CML Frequency Divider in a 65nm SOI CMOS," IEEE ISSCC 2007 Dig., pp. 542-543, Feb. 2007.
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IEEE ISSCC 2007 Dig
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Lim, D.1
Kim, J.2
Plouchart, J.-O.3
Trzcinski, R.4
Boning, D.5
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4
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39749184232
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A Combined Dynamic and Static Frequency Divider for a 40GHz PLL in 80nm CMOS
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Feb
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G. von Buren, C. Kromer, F. Ellinger, A. Huber, M. Schmatz, H. Jackel, "A Combined Dynamic and Static Frequency Divider for a 40GHz PLL in 80nm CMOS," IEEE ISSCC 2006 Dig., pp. 2462-2471, Feb. 2006.
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IEEE ISSCC 2006 Dig
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von Buren, G.1
Kromer, C.2
Ellinger, F.3
Huber, A.4
Schmatz, M.5
Jackel, H.6
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5
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34548836590
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Heterodyne Phase Locking: A Technique for High-Frequency Division
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Feb
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Behzad Razavi, "Heterodyne Phase Locking: A Technique for High-Frequency Division," IEEE ISSCC 2007 Dig., pp. 428-429, Feb. 2007.
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(2007)
IEEE ISSCC 2007 Dig
, pp. 428-429
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Razavi, B.1
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6
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39749125642
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SOI 90-nm Ring Oscillator Sub-ps Model-Hardware Correlation and Parasitic-aware Optimization to 1.94-ps Switching Delay
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Dec
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J.-O. Plouchart, "SOI 90-nm Ring Oscillator Sub-ps Model-Hardware Correlation and Parasitic-aware Optimization to 1.94-ps Switching Delay," 2005 International Electron Devices Meeting, Dec. 2005
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(2005)
2005 International Electron Devices Meeting
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Plouchart, J.-O.1
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7
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23944446418
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A 243-GHz Ft and 208-GHz Fmax, 90-nm SOI CMOS SoC Technology With Low-Power mmWave Digital and RF Circuit Capability
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July
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J.-O. Plouchart, N. Zamdmer, J. Kim, R. Trzcinski, S. Narasimha, M. Khare, L.F. Wagner, S.L. Sweeney, S. Chaloux, "A 243-GHz Ft and 208-GHz Fmax, 90-nm SOI CMOS SoC Technology With Low-Power mmWave Digital and RF Circuit Capability," IEEE Transactions on Electron Devices, Volume 52, Issue 7, pp. 1370-1375, July 2005.
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IEEE Transactions on Electron Devices
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Plouchart, J.-O.1
Zamdmer, N.2
Kim, J.3
Trzcinski, R.4
Narasimha, S.5
Khare, M.6
Wagner, L.F.7
Sweeney, S.L.8
Chaloux, S.9
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8
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21644473859
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A Low Power (45mW/Latch) Static 150 GHz CML Divider
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D. A. Hitko, et al. "A Low Power (45mW/Latch) Static 150 GHz CML Divider," IEEE CSICS 2004 Dig., pp. 167-170.
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IEEE CSICS 2004 Dig
, pp. 167-170
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Hitko, D.A.1
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9
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39049153241
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Low-Power, Low-Phase Noise SiGe HBT Static Frequency Divider Topologies up to 100 GHz
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Feb
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E. Laskin, S. T. Nicolson, P. Chevalier, A. Chantre, B. Sautreuil, S. P. Voinigescu, "Low-Power, Low-Phase Noise SiGe HBT Static Frequency Divider Topologies up to 100 GHz," IEEE BCTM 2006 Dig., pp. 526-527, Feb. 2006.
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(2006)
IEEE BCTM 2006 Dig
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Laskin, E.1
Nicolson, S.T.2
Chevalier, P.3
Chantre, A.4
Sautreuil, B.5
Voinigescu, S.P.6
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