Heterodyne phase locking: A technique for high-frequency division

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 428-429

  Razavi, Behzad ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; FREQUENCY DIVIDING CIRCUITS; HETERODYNING; TUNING;

DOWNCONVERSION MIXERS; EXTERNAL TUNING; FRACTIONAL DIVIDE RATIOS;

PHASE LOCKED LOOPS;

EID: 34548836590     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373477     Document Type: Conference Paper

References (2)

1. K. Yamamoto and M. Fujishima, "70GHz CMOS Harmonic Injection-Locked Divider," ISSCC Dig. Tech. Papers, pp. 600-601, Feb., 2006.
2. H. Wu and L. Zhang, "A 16-to-18GHz 0.18μm Epi-CMOS Divide-by-3 Injection-Locked Frequency Divider," ISSCC Dig. Tech. Papers, pp. 602-603, Feb., 2006.