Ultrahigh capacitance density for multiple ALD-Grown MIM capacitor stacks in 3-D silicon

IEEE Electron Device Letters

Volumn 29, Issue 7, 2008, Pages 740-742

  Klootwijk, Johan H ^a   Jinesh, K B ^b   Dekkers, W ^a   Verhoeven, J F ^a   van den Heuvel, F C ^a   Kim, H D ^c   Blin, D ^d   Verheijen, M A ^a   Weemaes, R G R ^a   Kaiser, M ^a   Ruigrok, J J M ^b   Roozeboom, F ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b NXP TSMC Research Center   (Netherlands)

^c Jusung Engineering Ltd   (South Korea)

^d Jusung Engineering Europe   (France)

Author keywords

Atomic layer deposition (ALD); Deep reactive ion etching (DRIE); Equivalent series inductance (ESL); Equivalent series resistance (ESR); Fowler Nordheim (FN) tunneling; High dielectrics; High density capacitors; Low pressure chemical vapor deposition (LPCVD); Macropore arrays; Metal insulator metal (MIM); Reactive ion etching (RIE); Silicon devices

Indexed keywords

ATOMIC LAYER DEPOSITION; CAPACITANCE; CAPACITORS; DIELECTRIC DEVICES; ELECTRIC CURRENTS; ELECTRIC EQUIPMENT; ENERGY STORAGE; EPITAXIAL GROWTH; METAL INSULATOR BOUNDARIES; METALS; MIM DEVICES; NONMETALS; SILICON;

ATOMIC LAYER DEPOSITION (ATL); CAPACITANCE DENSITY; LAYER STACKING; METAL HIGH INSULATOR METAL (MIM) CAPACITOR; METAL INSULATOR METAL (MIM);

PHYSICAL VAPOR DEPOSITION;

EID: 47249153275     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.923205     Document Type: Article

References (12)

1. F. Roozeboom, W. Dekkers, E. van Grunsven, F. Sanders, M. Burghoorn, T. Sakai, J. Klootwijk, J. Verhoeven, F. van den Heuvel, S. Heil, and W. Kessels, "Passive and heterogeneous integration techniques for 3D system-in-package applications," Thin Solid Films, vol. 504, pp.391-396, 2006.
2. F. Murray, F. LeCornec, S. Bardy, C. Bunel, J. Verhoeven, F. van den Heuvel, J. Klootwijk, and F. Roozeboom, "Silicon based system-in-package: Breakthroughs in miniaturization and 'nano'-integration supported by very high quality passives and system level design tools," in Proc. Mater. Res. Soc. Symp., 2007, vol. 969, pp. 27-36.
3. F. Roozeboom, J. H. Klootwijk, J. F. C. Verhoeven, F. C. van den Heuvel, W. Dekkers, S. B. S. Heil, J. L. van Hommon, M. C. M. van dc, Sandon, W. M. M. Kessels, F. LeCornec, L. Guiraud, D. Chevrie, C. Bunel, F. Murray, H.-D. Kim, and D. Blin, "ALD options for Si-integrated ultrahigh-density, decoupling capacitors in pore and trench designs," Trans. ECS, vol 3, no. 15, p. 173, 2007
4. ITRS 2006. [Online]. Available: http://www.itrs.net/
5. 2 MIM capacitors integrated in BiCMOS technology" in Proc. 35th ESSDERC, Grenoble, France, 2005, pp. 121-124.
6. 2 MOSFETS," IEEE Trans. Electron Devices, vol. 50, no. 6, pp. 1517-1524, Jun. 2003.
7. M. Gutsche, H. S. J. Luetzen, A. Birner, T. Hecht, S. Jakschik, M. Kerber, M. Leonhardt, P. Moll, T. Pompl, H. Reisinger, S. R. A. Saenger, U. Schroeder, B. Sell, A. Wahl, and D. Schumann, "Capacitance enhancement techniques for sub-100 nm trench DRAMs," in IEDM, Tech. Dig., 2001, pp 18.61-18.6.4.
8. F. Roozeboom, A. Kemmeren, J. Verhoeven, E. van den Heuvel, H. Kretschman, and T. Frič, "High density, low-loss mOS decoupling capacitors integrated in a GSM power amplifier," in Proc. Mater. Res. Soc. Symp, 2003, vol. 783, p. 157.
9. 5-based MIM capacitors for future RE IC applications," in VLSI Symp. Tech. Dig., Jun. 2005, pp. 56-57.
10. 3 laminate dielectrics.," IEEE Electron Device Lett., vol. 24, no. 12, pp. 730-732, Dec. 2003.
11. J. H. Klootwijk, A. Kemmeren, R. Wolters, F. Roozeboom, J. Verhoeven, and E. van den Heuvel, "Extremely high-density capacitors with ALD high-k dielectric layers," in Defects in High-k Gate Dielectric Stacks, E. Gusev, Ed. Dordrecht, Germany: Spriinger-Verlag, 2006, pp. 17-28.
12. 3 films grown by atomic layer deposition on silicon and various metal substrates," Thin Solid Films, vol. 413, no. 1, pp. 186-197, Jun. 2002.